Compression Memory Coloring for Fine-Grained Access Control
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Solution Overview
Problem
Conventional methods for memory protection and malware detection are inadequate in preventing unauthorized data accesses and software vulnerabilities, particularly in multi-component processing devices, as they require additional memory accesses and storage, leading to performance degradation and failure to prevent sophisticated memory-based malware attacks.
Innovation Solution
The implementation of compression memory coloring, which associates specific memory pages with programs and data using a 'color' attribute, allowing access control at a fine granularity, integrated into existing page-based memory management structures, to prevent unauthorized access and detect malicious activities without degrading performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional memory protection methods are used, then memory access control is provided, but additional memory accesses and storage are required leading to performance degradation
Solution Approach 1:
The patent combines memory protection attributes (colors) directly with memory data in the same cache line, eliminating the need for separate metadata storage structures. This merging of protection information with data itself reduces additional memory accesses and storage overhead, thereby improving system performance while maintaining memory access control.
Solution Approach 2:
The patent extracts the color attribute from traditional page-based memory management structures and integrates it at the cache line level within the data itself. This extraction and repositioning of the protection mechanism allows for finer-grained control without requiring separate lookup tables or additional memory structures, reducing performance overhead.
2Ease of operation
If page-based memory management is used, then memory allocation is simplified, but access control granularity is too coarse to prevent sophisticated malware attacks
Solution Approach 1:
The patent segments the memory protection mechanism from the page level down to the cache line level (64 bytes). By dividing the protection granularity to match the fundamental unit of memory access in modern processors, the system achieves fine-grained access control that can prevent sophisticated malware attacks while maintaining the simplicity of page-based allocation through the use of page-aligned color assignments.
3Reliability
If additional metadata structures are added for memory protection, then access control is enhanced, but device complexity increases
Solution Approach 1:
The patent merges the color attribute directly into the cache line data structure, eliminating the need for separate metadata tables, lookup structures, or additional memory regions for storing protection information. This integration reduces device complexity by removing redundant structures while maintaining enhanced access control through the embedded color verification mechanism.
4Reliability
If memory protection mechanisms are added, then security against malware is improved, but performance due to additional memory accesses degrades
Solution Approach 1:
The patent extracts the protection attribute from external metadata structures and embeds it directly within the cache line data. This allows the color verification to be performed as part of the normal memory access operation without requiring additional memory reads or writes, thereby maintaining security while minimizing performance impact.
Solution Approach 2:
The cache line itself carries its own color attribute, allowing it to self-verify its protection status during memory operations. This self-service mechanism eliminates the need for external verification structures and reduces performance overhead by performing security checks as an intrinsic part of the memory access operation.
Data Source
AI summary
Techniques and computing devices for compression memory coloring are described. In one embodiment, for example, an apparatus may include at least one memory, at least on processor, and logic for compression memory coloring, at least a portion of the logic comprised in hardware coupled to the at least one memory and the at least one processor, the logic to determine whether data to be written to memory is compressible, generate a compressed data element responsive to determining data is compressible, the data element comprising a compression indicator, a color, and compressed data, and write the compressed data element to memory. Other embodiments are described and claimed.