Dynamic Compression Priority for Storage Cache Msets

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Solution Overview

Problem

The limited cache size in storage devices leads to performance issues due to the need to swap msets in and out of RAM, and the time-consuming process of updating compressed msets, which negatively impacts overall storage device performance.

Innovation Solution

Implementing a dynamic priority approach for compression, where msets are prioritized based on criteria such as uLayer state, read ratio, prediction, and queue depth, to limit compression only to those msets that are ready and likely to require updates, thereby reducing unnecessary decompression and recompression processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the controller compresses msets to fit more msets in limited RAM space, then the cache size is virtually increased, but the synchronization time increases when updates need to be performed

Engineering Contradiction:
Improvecache sizeVSAvoidsynchronization time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent changes the state of msets from uncompressed to compressed form to increase cache capacity. By compressing msets, the controller can store more mapping data in limited RAM space, effectively increasing the cache size without adding physical memory resources.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The controller performs compression of msets during idle processing periods before updates are needed. This preliminary compression action prepares the cache for potential future updates, allowing the system to maximize cache utilization while planning for efficient update handling when they occur.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the controller compresses msets during idle processing, then more msets can be cached in RAM, but the processing time increases when updates are performed on compressed msets

Engineering Contradiction:
Improvecache utilizationVSAvoidupdate processing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies compression to transform msets into a more space-efficient format, allowing higher cache utilization. The compressed state reduces the space required to store mapping data, enabling the limited RAM to hold more msets and improve overall cache effectiveness.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system dynamically manages the compressed state of msets, transitioning between compressed and uncompressed forms as needed. During idle periods, msets remain compressed to maximize cache capacity; when updates are required, the system dynamically decompresses, updates, and recompresses the affected msets, adapting to changing operational requirements.

Inventive Principle:
Principle #15Dynamics

3Speed

If the controller caches more msets in limited RAM and HMB, then faster access is achieved, but the cache size limitation still requires retrieving some msets from memory device

Engineering Contradiction:
Improveaccess speedVSAvoidcache management complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent uses compression to change the storage parameter of msets, reducing their size by approximately 70-80%. This allows the controller to cache a significantly larger number of msets within the fixed capacity of RAM and HMB, minimizing the need to retrieve msets from the slower memory device and thereby maintaining fast access speeds.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system implements a multi-layered cache structure where compressed msets are nested within the limited RAM and HMB resources. By compressing msets, the system effectively creates additional nesting levels of caching, allowing more data to be stored in the faster memory layers and reducing access to the slower memory device.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS12332815B1Dynamically assigning compression priority to cached entries in storage devices
Publication Date: 2025.06.17 SANDISK TECHNOLOGIES LLC
  • US12332815B1 patent drawing
  • US12332815B1 patent drawing
  • US12332815B1 patent drawing

AI summary

A storage device minimizes updates to compressed msets based on a priority criterion. The storage device includes a memory including a logical-to-physical (L2P) table divided into msets that include a range of entries in the L2P table. The storage device also includes memory to cache a first set of msets. A controller on the storage device accesses the first set of msets to quickly read data from and write data to the memory device. The controller determines a uLayer state for a first mset in the first set of msets, a read ratio for the first mset, a prediction for the first mset, and/or a queue depth for the first mset in determining whether the first mset meets the priority criterion and is ready for compression. The controller assigns a high priority to the first mset if the first mset meets the priority criterion and compresses the first mset.