Computation Circuit Reducing Quantization Error via Segmented Paths
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Solution Overview
Problem
Conventional computation circuits experience significant quantization errors due to the wide distribution of calculation results from different convolution paths, as the quantization operation is performed without considering these differences.
Innovation Solution
The proposed computation circuit includes multiple first and second operation circuits performing convolution operations, with separate quantization circuits for each path to reduce quantization errors, and an adder circuit for element-wise addition of their outputs, allowing quantization to be performed on data with a limited range of distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single quantization circuit is used to process outputs from multiple convolution circuits with different calculation paths, then the device complexity is reduced, but the quantization error increases significantly due to the wide distribution of concatenated outputs
Solution Approach 1:
The patent divides the single quantization operation into multiple separate quantization circuits, each processing outputs from specific convolution circuits with identical calculation paths. This segmentation allows each quantization circuit to handle data with narrower, more consistent distributions, thereby reducing quantization error while maintaining manageable device complexity through structured organization.
Solution Approach 2:
The patent applies different quantization operations to different calculation paths based on their specific characteristics. Each quantization circuit is tailored to process outputs from convolution circuits sharing the same calculation path, ensuring that the quantization parameters and operations are optimized for the local data distribution of each path, thus improving overall quantization precision.
2Manufacturing precision
If separate quantization circuits are used for each convolution path, then the quantization error is reduced, but the device complexity increases
Solution Approach 1:
The patent segments the quantization task into multiple circuits organized according to calculation paths, where each circuit handles a specific subset of convolution outputs. This segmentation reduces quantization error by narrowing data distributions while controlling complexity through systematic organization of the segmented circuits.
Solution Approach 2:
The patent merges the outputs from multiple second convolution circuits through addition operations to produce the final output. This merging approach allows the system to benefit from multiple specialized quantization circuits while maintaining a unified output interface, effectively managing device complexity despite the increased number of quantization circuits.
Data Source
AI summary
A computation circuit includes a plurality of first operation circuits; a plurality of quantization circuits configured to quantize outputs of the plurality of first operation circuits, respectively; a plurality of second operation circuits configured to perform operations on outputs of the plurality of quantization circuits, respectively; and an adder circuit configured to perform element wise addition operation on outputs of the plurality of second operation circuits.