Computational SSD Architecture for Local Processing and Lower Bus Bandwidth
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Solution Overview
Problem
Existing systems face challenges in managing increasing data volumes due to high processor and bus bandwidth utilization, limited throughput, and latency between processors and storage devices, necessitating techniques to reduce these constraints.
Innovation Solution
Implementing computational SSDs that perform computational operations locally, utilizing a single memory array divided into portions for coarse and fine searches, computations, or access operations, thereby reducing the need for data movement and processor utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transferred from storage device to processor via bus for processing, then processing capability is improved, but bus bandwidth utilization and processor utilization increase excessively
Solution Approach 1:
The patent combines storage and computation functions into a single computational storage device. The memory array serves dual purposes: storing data and performing computational operations directly on the stored data, thereby merging previously separate storage and processing functions into one integrated system that reduces bus bandwidth requirements
Solution Approach 2:
The computational storage device performs computational operations autonomously on data stored in its memory array without requiring constant processor intervention or data transfer. The device independently executes operations such as searching, sorting, and data analysis, serving its own processing needs and reducing the burden on external processors and buses
2Quantity of substance
If data volume increases, then storage capacity is improved, but processor utilization and bus bandwidth utilization increase
Solution Approach 1:
The memory array is divided into multiple portions, each dedicated to specific computational functions such as coarse search, fine search, computation, or access operations. This segmentation allows different parts of the stored data to be processed independently and in parallel, managing large data volumes without proportionally increasing processor utilization
Solution Approach 2:
The computational storage device autonomously performs computational operations on stored data, including searching, filtering, and analysis, without requiring external processor intervention. This self-service capability allows the system to manage increasing data volumes while maintaining constant processor utilization levels
3Measurement precision
If data is processed after transfer from storage, then processing accuracy is improved, but latency between storage and processor increases
Solution Approach 1:
Computational operations are performed directly on data while it remains stored in the memory array, before any data transfer to external processors occurs. This preliminary computation includes pre-filtering, pre-searching, and pre-processing operations that reduce the amount of data that needs to be transferred and processed externally, thereby reducing latency while maintaining accuracy
Solution Approach 2:
The patent merges storage and computation into a single integrated device, eliminating the temporal separation between data retrieval and data processing. Operations such as searching and analysis are performed in-place on stored data, combining what were previously sequential operations into a simultaneous process that reduces overall latency
4Loss of energy
If computational operations are performed locally in memory array, then bus bandwidth utilization is reduced, but device complexity increases
Solution Approach 1:
Different portions of the memory array are configured with different local properties and functions. Some portions are optimized for coarse search, others for fine search, computation, or access operations. This local differentiation allows the system to perform diverse computational operations within the memory array itself without requiring a completely new complex architecture
Solution Approach 2:
The memory array is designed to perform multiple functions: data storage, computational operations, searching, sorting, and data analysis. This multi-functionality allows the device to reduce bus bandwidth utilization across various workloads without requiring separate specialized hardware for each function, thereby managing complexity through versatile design
Data Source
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AI summary
A system based on computational memory and memory systems, such as embodied in computational solid state drive (SSD) technology, as described herein, reduces processor utilization and/or bus bandwidth utilization. The system is enabled to perform computational techniques (e.g., searching, computing, and/or accessing) using resources of the computational SSDs, rather than processor and/or bus resources, thus reducing or minimizing information movement between processing elements and storage devices. Computational SSD technology enables managing, organizing, selecting, and analyzing ever increasing data volume in real time. A computational SSD is enabled to store and to operate on data locally, e.g., using resources of the computational SSD. Thus, processing, storage, and bandwidth requirements of a system are reduced by using the computational SSD.