Computational Storage Data Transfer Without Host Memory Mapping
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Solution Overview
Problem
Existing computational storage devices face limitations in scaling due to memory mapping restrictions by server BIOS, which restrict device memory size and prevent efficient peer-to-peer operations, especially in network-attached modes, leading to reduced performance and scalability.
Innovation Solution
The proposed systems and methods enable data transfers between storage devices and co-devices without host system address mapping, using mechanisms for internal device memory management and translation, allowing for peer-to-peer operations and scaling without exposing device memory to the host system, applicable to computational SSDs and other storage devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If device memory is exposed to host system address space for data transfers, then data transfer capability is enabled, but memory mapping restrictions by server BIOS limit device memory size and scalability
Solution Approach 1:
The patent introduces a computational storage device as an intermediary between the host system and storage media, enabling data transfers without exposing device memory to the host system address space. The computational storage device includes a processing element that can perform data operations locally, acting as a mediator that eliminates the need for traditional memory mapping while maintaining data transfer capability.
Solution Approach 2:
The patent extracts the memory mapping function from the host system and relocates it to the computational storage device. By taking out the memory exposure requirement and replacing it with local processing capabilities, the system avoids BIOS memory mapping restrictions while preserving data transfer functionality.
2Ease of operation
If traditional host system address mapping is used for data transfers, then data access is simplified, but network latencies increase and data transfer rates decrease
Solution Approach 1:
The patent segments the data access operation into two parts: simple address specification by the host and complex data transfer execution by the computational storage device. This segmentation allows the host to specify data access locations using simple commands while the computational storage device handles the actual data movement locally, reducing network latency and improving transfer rates.
Solution Approach 2:
The computational storage device performs self-service by executing data operations locally without requiring continuous host system intervention. The processing element on the computational storage device autonomously handles data transfers between storage media and host memory, eliminating the need for repeated network round-trips and reducing overall latency.
3Productivity
If device memory is exposed to host system, then data transfers can proceed, but scalability is limited due to BIOS memory mapping restrictions
Solution Approach 1:
The computational storage device serves as an intermediary that enables scalable data transfers without being constrained by host BIOS memory mapping limitations. By positioning the processing element within the computational storage device rather than relying on host system resources, the architecture achieves both high productivity and scalability.
Data Source
AI summary
Provided are systems, methods, and apparatuses for managing memory. The method can include: establishing a connection via an interface, between a host device and a storage device; and transferring data, via the interface, between first memory associated with the host device and second memory associated with the storage device by performing a data operation on the second memory by an application executed by the host, where the storage device includes a processing element that accelerates the data operation by performing at least one offload function on the data operation.