Computational Storage With FHE for Reduced Host Processor Load
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Solution Overview
Problem
The increasing capacity of storage devices leads to longer data transfer times between storage and main memory, burdening the host processor with processing demands, reducing its cycle availability for other commands.
Innovation Solution
A multi-function device supporting storage devices and computational storage units, including Fully Homomorphic Encryption (FHE) circuits, operates internally to reduce host processor involvement, using a buffer for data sharing and asynchronous communication to optimize data processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If storage device capacity is increased, then data storage capability is improved, but data transfer time to main memory increases
Solution Approach 1:
The patent extracts the data processing function from the host processor and relocates it to the storage device itself. By implementing processing circuits within the storage device, the system can perform computations directly on stored data without transferring it to main memory, thereby resolving the contradiction between increased storage capacity and data transfer time.
Solution Approach 2:
The patent introduces a new dimension of computation by enabling processing circuits to operate within the storage device architecture. This allows data processing to occur in the storage dimension rather than requiring transfer to the host processor dimension, effectively reducing transfer time while maintaining large capacity.
2Productivity
If host processor executes commands to process data, then data processing is achieved, but host processor burden increases
Solution Approach 1:
The patent extracts data processing functionality from the host processor and implements it within the storage device through dedicated processing circuits. This relocation reduces the host processor's burden while maintaining data processing capability, as the storage device can independently execute processing operations on its stored data.
Solution Approach 2:
The storage device is designed to process its own data using integrated processing circuits, eliminating the need for constant host processor intervention. The storage device serves itself by performing computations directly on stored data, thereby reducing host processor load while maintaining productivity.
3Productivity
If data is transferred to main memory for processing, then processing can be performed, but host processor cycle availability is reduced
Solution Approach 1:
The patent extracts the processing function from the host processor cycle and relocates it to the storage device. By implementing processing circuits within the storage device, the system can perform data processing without consuming host processor cycles, thereby resolving the contradiction between processing throughput and host processor cycle availability.
Data Source
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AI summary
A multi-function device is disclosed. The multi-function device may include a first connector for communicating with a storage device, a second connector for communicating with a Fully Homomorphic Encryption, FHE, circuit, and a third connector for communicating with a host processor. The multi-function device is configured to expose the storage device to the host processor via the third connector. The multi-function device may comprise a FHE circuit integrated with the multi-function device instead of the second connector for communicating with a FHE circuit.