Configurable Computational Storage Drives With FPGA Interface Switching

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Solution Overview

Problem

Existing compute-centric architectures struggle to scale with the increasing volume of data, and diverse storage devices complicate data access and analysis due to the need for multiple host controllers and interfaces, leading to redundant hardware and increased costs.

Innovation Solution

An FPGA-based system with a configurable drive interface that detects and adapts to various storage types, using a PCI bridge to convert communication protocols and support multiple drive interfaces, including SAS, SATA, and NVMe, eliminating the need for redundant host controllers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple host controllers are used to support diverse storage devices, then compatibility with various storage types is improved, but device complexity and hardware redundancy increase

Engineering Contradiction:
Improvecompatibility with various storage typesVSAvoidhardware redundancy
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal host controller using FPGA technology that can dynamically configure and support multiple storage device interfaces (SAS, SATA, NVMe, USB) through a single device. The FPGA-based controller loads appropriate driver libraries based on detected storage device types, eliminating the need for multiple dedicated controllers while maintaining full compatibility across diverse storage protocols

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The host controller employs dynamic configuration capabilities where the FPGA can reprogram itself at runtime to adapt to different storage device types. The system detects the connected storage device type and dynamically loads corresponding driver libraries, allowing the controller to transform its functionality based on real-time requirements rather than being statically configured for a single interface type

Inventive Principle:
Principle #15Dynamics

2Power

If compute-centric architecture is used, then data processing capability is improved, but scalability with increasing data volume deteriorates

Engineering Contradiction:
Improvedata processing capabilityVSAvoidscalability with data volume
Core Design Contradiction:
PowerVSProductivity

Solution Approach 1:

The patent segments the computing architecture by implementing computational storage capabilities directly within storage devices through integrated FPGAs. This distributes processing power across multiple storage units rather than concentrating it in a central compute node, enabling the system to scale horizontally by adding more storage devices with embedded processing capabilities to handle increasing data volumes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a traditional two-tier architecture (separate compute and storage) to a three-dimensional architecture where storage devices themselves possess computational capabilities. This adds a vertical dimension of computation within the storage layer, allowing data processing to occur at the edge of the storage system and enabling better scalability as data volumes grow

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12524170B2Computational storage with configurable drives
Publication Date: 2026.01.13 SEAGATE TECH LLC
  • US12524170B2 patent drawing
  • US12524170B2 patent drawing
  • US12524170B2 patent drawing

AI summary

The system disclosed herein includes one or more storage drives, an FPGA based controller board, and a flash memory configured to store one or more FPGA executable binary libraries. The FPGA based controller board may include a drive logic detector configured to detect the type of the one or more of the storage drives and an FPGA executable libraries configuration module configured to select one or more of the FPGA executable binary libraries from the flash memory based on the type of the one or more of the storage drives to implement an FPGA based interface for communication between the one or more storage drives and a host.