Computational Storage Controller Internal Command Processing
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Solution Overview
Problem
Current semiconductor memory devices, particularly flash memory-based storage systems, face challenges in reducing costs and improving performance, especially in managing computations and applications within storage devices to alleviate the burden on host devices.
Innovation Solution
A computational storage device with a storage controller that includes a computation engine, a flash translation layer, and a memory interface block, which performs address mapping and controls non-volatile memory devices, allowing for internal commands and host commands to be processed and mapped efficiently, thereby reducing the computational load on host devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If storage devices perform computations and applications internally to reduce host device burden, then computational efficiency is improved, but device complexity increases
Solution Approach 1:
The storage device is segmented into distinct functional modules: a computation engine for executing applications and generating commands, a flash translation layer for address mapping, and a memory interface block for memory control. This segmentation allows each module to specialize in specific tasks, improving computational efficiency while managing complexity through modular design
Solution Approach 2:
The storage controller is designed with multi-functionality, serving both as a storage management device and a computation device. The computation engine can execute various applications (compression, encryption, filtering) while the same device handles storage operations, reducing the need for separate host device processing and alleviating host burden
2Productivity
If a host interface block receives and processes both host commands and internal commands, then processing efficiency is improved, but device complexity increases
Solution Approach 1:
The host interface block is designed as a universal interface that can receive and process both host commands from external devices and internal commands generated by the computation engine. This multi-functional capability allows single-point entry for all command types, improving processing efficiency while the internal command structure manages the complexity of handling diverse command sources
Data Source
AI summary
A computational storage device includes a non-volatile memory (NVM) device; and a storage controller configured to control the NVM device. The storage controller includes: a computation processor configured to execute an internal application to generate an internal command; a host interface circuit configured to receive a host command from an external host device, to receive the internal command from the computation processor, and to individually process the received host command and the received internal command; a flash translation layer (FTL) configured to perform an address mapping operation based on a result of the processing of the host interface circuit; and a memory interface circuit configured to control the NVM device based on the address mapping operation of the FTL.