Computational Storage Processing for Mixed Data Formats Near Memory

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Solution Overview

Problem

Conventional computational storage systems lack flexibility and adaptability in handling various data formats and functions due to hardware-based implementations, leading to inefficiencies and high costs in adapting to format changes.

Innovation Solution

A combination of software instructions and hardware acceleration engines near memory is used to perform functions in storage devices, allowing for flexible and efficient processing of diverse data formats and functions, including database page processing and scan operations, through a scheduler to optimize resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If hardware-based implementations are used for computational storage, then processing speed is improved, but flexibility and adaptability to handle various data formats deteriorate

Engineering Contradiction:

Improveprocessing speedVSAvoidflexibility to handle various data formats

Core Design Contradiction:

SpeedVSAdaptability or versatility

Solution Approach 1:

The system dynamically switches between hardware acceleration for speed-critical operations and software processing for format-adaptability tasks. The processor core can selectively invoke hardware acceleration engines based on operation type, enabling the system to optimize for speed when handling standardized operations while maintaining flexibility for format variations through software-based interpretation and processing.

Inventive Principle:

Principle #15Dynamics

2Productivity

If hardware-based implementations are used, then processing efficiency is improved, but adaptability to format changes deteriorates, leading to high costs

Engineering Contradiction:

Improveprocessing efficiencyVSAvoidadaptability to format changes

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The processor core serves as a universal processing unit that can handle both hardware-accelerated operations and software-based format adaptation. It provides multi-functionality by coordinating between fixed-function hardware engines and flexible software processing, allowing a single system to efficiently process multiple data formats without requiring separate hardware for each format variant.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The processor core acts as an intermediary between the rigid hardware acceleration engines and the variable data formats. It translates and coordinates operations between the hardware layer and software layer, enabling format-adaptive processing while maintaining efficient hardware utilization for standardized operations.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Device complexity

If traditional hardware-only solutions are used, then system simplicity is maintained, but processing speed and flexibility deteriorate

Engineering Contradiction:

Improvesystem simplicityVSAvoidprocessing speed

Core Design Contradiction:

Device complexityVSSpeed

Solution Approach 1:

The computational storage system is segmented into distinct functional layers: hardware acceleration engines for speed-critical operations, a coordinating processor core for management and flexibility, and software for format adaptation. This segmentation allows each component to be optimized independently while working together to provide both speed and flexibility without requiring complete system redesign.

Inventive Principle:

Principle #1Segmentation

4Power

If hardware-based implementations are used, then processing power is improved, but power consumption increases

Engineering Contradiction:

Improveprocessing powerVSAvoidpower consumption

Core Design Contradiction:

PowerVSUse of energy by moving object

Solution Approach 1:

The system dynamically activates hardware acceleration engines only when processing operations that benefit from their speed advantages, rather than continuously operating them. The processor core intelligently determines when to invoke hardware acceleration versus software processing, reducing overall power consumption by keeping high-power hardware components idle during operations that don't require their processing power.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS12554507B2Systems and methods for processing formatted data in computational storage

Publication Date: 2026.02.17 SAMSUNG ELECTRONICS CO LTD

AI summary

Provided is a method for performing computations near memory. The method includes receiving, at a storage device, first data associated with a first data set, the first data having a first format. The method further includes receiving, at a processor core of the storage device, a request to perform a function on the first data, the function including a first operation and a second operation. The method further includes performing, by a first processor-core acceleration engine of the storage device, the first operation on the first data, based on first processor-core custom instructions, to generate first result data. The method further includes performing, by a first extra-processor-core circuit of the storage device, the second operation on the first result data, based on the first processor-core custom instructions.