Compute-in-Memory Array Using Digital Control for Accurate Resistive Writing
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Solution Overview
Problem
Current compute-in-memory arrays for neural networks face challenges in writing operations due to the time-consuming nature of writing analog values into memory and limited storage accuracy, which hinders efficient matrix operations in neuromorphic computing.
Innovation Solution
A compute-in-memory array with storage cells composed of bitcells connected in series, each including a switching device and a resistive memory, where the switching device controls the resistance state of the resistive memory to determine the write resistance value, enabling faster writing operations and improved storage accuracy by utilizing different resistance states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If analog values are written into memory by repeatedly comparing with a target current, then the storage accuracy is improved, but the writing operation time increases significantly
Solution Approach 1:
The patent changes the writing mechanism from analog comparison to digital control. By using digital-to-analog converters (DAC) and controllable current sources, the system writes digital values that are converted to analog currents, enabling precise control of storage cell states without time-consuming repeated comparisons. This parameter change from analog to digital writing method resolves the contradiction between accuracy and speed.
Solution Approach 2:
The patent replaces the mechanical comparison process with an electronic field-effect-based writing mechanism. Instead of physically comparing analog values through repeated operations, the system uses field-effect transistors and controllable current mirrors to directly establish the desired current state in storage cells, achieving both speed and precision simultaneously.
2Device complexity
If the analog memory uses limited storage accuracy, then the device complexity is reduced, but the information carrying capacity decreases
Solution Approach 1:
The patent segments the memory system into distinct functional units: digital control logic, digital-to-analog converters (DAC), controllable current sources, and storage cells. This segmentation allows the system to maintain simple analog storage cells while adding digital precision through separate conversion and control modules, thereby increasing information capacity without proportionally increasing overall complexity.
Solution Approach 2:
The patent introduces digital-to-analog converters (DAC) and controllable current sources as intermediary components between the digital control logic and the analog storage cells. These intermediaries translate digital precision into analog current values, enabling high-precision writing operations while keeping the storage cells themselves relatively simple in structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables quick and accurate writing operations, enhancing the storage capacity and accuracy of the compute-in-memory array, thereby improving the efficiency of matrix operations in neural networks.
Implementation Method 1
each bitcell including a switching device and a resistive memory, the switching device is connected in series or in parallel with the resistive memory, and a write resistance value of the storage cell is determined by controlling the switching state of the switching device to change the resistance state of the resistive memory
Data Source
AI summary
Disclosed are a compute-in-memory array and module, and a data computing method; a storage cell is configured to form an array used for computation; the storage cell consists of bitcells serially connected in sequence; a bitcell comprises a switching device and a resistive memory; the switching device is connected in series or in parallel with the resistive memory; the write resistance value of the storage cell is determined by means of controlling the switching state of the switching device so as to change the resistance state of the resistive memory. Since resistive memories have different resistance states, a resistive memory can be set in different resistance states by means of the switching state of the switching device, such that the storage cell is at a required write resistance value, thereby enabling the quick implementation of a write operation of the bitcell.