Compute-in-Memory Data Analysis via Segmented Processing

The data path is segmented into multiple functional zones: memory array region, computation circuit region with page buffers, and data analysis circuit region. Each segment performs specific functions (storage, computation, analysis) that were previously concentrated in a single short path, enabling both high speed and enhanced capability through distributed processing.

The invention extends the data path from a simple linear connection to a multi-dimensional architecture by adding vertical layers of computation and analysis circuits. Data can flow horizontally across the memory array and vertically through computation circuits and page buffers, creating a three-dimensional data processing space that increases both capability and efficiency.

Computation circuits are merged with memory structures by integrating them directly into the data path between the memory array and input/output interface. This co-location eliminates the need for separate memory read operations followed by external processing, allowing data to be computed on-the-fly during normal memory operations, thereby improving productivity without proportionally increasing energy consumption.

The memory system performs computation and data analysis functions for itself through integrated circuits within its own data path. The computation circuits execute logic operations on data as it passes through the memory array, and data analysis circuits further process results without requiring external processing units, enabling the memory system to serve its own computational needs efficiently.