Compute Node Deadlock Prevention via Transaction Rollback
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Solution Overview
Problem
In high-speed computing based on multicore system architectures, achieving Total Store Order (TSO) among multiple PCIe devices is challenging due to potential deadlocks, which can occur when write transactions are not properly ordered, leading to performance issues and errors.
Innovation Solution
A compute node with a multicore processor and switching circuitry detects potential deadlock conditions between PCIe devices and memory, generates a transaction to rollback all write transactions, and temporarily removes them to prevent deadlocks, using existing protocols like the ARM CHI protocol to ensure proper ordering across multiple devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple PCIe devices perform write transactions to memory simultaneously, then system throughput and productivity are improved, but deadlock conditions may occur due to improper ordering
Solution Approach 1:
The system performs preliminary detection of deadlock patterns by monitoring the order of write transactions from multiple PCIe devices. When a potential deadlock condition is detected (such as out-of-order writes that could cause circular dependencies), the system proactively rolls back the transactions before the deadlock actually occurs, preventing the harmful state while maintaining high throughput during normal operation
Solution Approach 2:
The system implements a feedback mechanism where the memory controller or interconnect monitors write transaction patterns from multiple PCIe devices. When improper ordering is detected that could lead to deadlock, the system sends feedback signals to roll back the problematic transactions, ensuring TSO compliance while allowing parallel processing to continue
2Reliability
If write transactions are rolled back to prevent deadlock, then reliability and ordering correctness are improved, but performance and productivity deteriorate due to transaction cancellation
Solution Approach 1:
The system applies rollback only partially - specifically targeting only those write transactions that create deadlock patterns, while allowing other properly ordered transactions to proceed without interruption. This selective approach ensures TSO compliance for problematic cases while maintaining high throughput for normal operations, avoiding the performance penalty of blanket transaction cancellation
Data Source
AI summary
A computing system comprises one or more cores. Each core comprises a processor. In some implementations, each processor is coupled to a communication network among the cores. In some implementations, a switch in each core includes switching circuitry to forward data received over data paths from other cores to the processor and to switches of other cores, and to forward data received from the processor to switches of other cores. Also discussed are techniques to add new capabilities to protocols, such as the CHI protocol to achieve “Total Store Order” (TSO) among multiple devices, such as PCI Express devices, in a cost effective manner.