Fault-Tolerant Compute Node Failover via Smart State Exchange

The patent introduces an intermediate buffer memory and control logic that mediates the state transfer between compute nodes. The buffer memory serves as an intermediary storage element that temporarily holds processor and memory state information during the failover process, eliminating the need for complex real-time coordination software and hardware mechanisms.

The patent implements a copying mechanism where the state of the failing compute node (processor state, memory state, device hierarchy) is replicated to the standby compute node. This copying approach simplifies the failover process by creating a ready-to-use duplicate state rather than requiring complex state synchronization and coordination protocols.

The patent enables compute nodes to perform failover operations autonomously without requiring external processor coordination. Each compute node has self-contained control logic and buffer memory that allows it to detect failures, initiate failover sequences, and transfer state information independently, eliminating the need for external coordination hardware.

The patent divides the failover system into independent, self-sufficient compute nodes, each with its own buffer memory and control logic. This segmentation allows each node to operate autonomously and perform failover operations independently, reducing the need for complex external coordination hardware while maintaining fault tolerance.

The patent implements preliminary action by pre-allocating buffer memory at each compute node and maintaining device hierarchy information in a ready-to-transfer format. This preparation ensures that when failover is needed, the state information can be quickly copied and transferred without delays associated with real-time data collection and formatting.

The patent uses efficient copying mechanisms to transfer processor state, memory state, and device hierarchy information. By maintaining pre-formatted state information and using direct memory copy operations, the system achieves fast state transfer that minimizes failover time while ensuring complete service continuity.