Compute Engine Scheduling With Timing Fences for Deterministic Execution

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Solution Overview

Problem

Scheduling tasks on complex Systems on a Chip (SoCs) with heterogeneous hardware platforms is challenging due to dynamic scheduling's complexity and static scheduling's inability to account for underlying differences between different compute engines, leading to inadequate performance and safety in autonomous systems.

Innovation Solution

A deterministic task management system that generates execution schedules for tasks across multiple compute engines, using synchronization primitive fencing to ensure consistent execution sequencing and timing, with oversight from a central engine, and includes monitoring and remedial operations to maintain timing guarantees.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If dynamic scheduling and preemption are used, then task execution flexibility is improved, but state space complexity and validation difficulty increase

Engineering Contradiction:
Improvetask execution flexibilityVSAvoidstate space complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The scheduling system segments task execution into discrete time slots and prioritizes tasks based on predetermined criteria. Each time slot is assigned to a specific task, creating a segmented schedule that reduces the complexity of tracking all possible execution paths while maintaining flexibility through priority-based preemption within the segmented framework.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary scheduling actions by pre-determining task priorities and time slot assignments before execution begins. This preliminary scheduling reduces runtime decision complexity and enables deterministic behavior, which simplifies validation and certification while still allowing for necessary adjustments through priority-based preemption.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If priority-based real-time scheduling is used, then CPU task management is improved, but timing guarantees on heterogeneous hardware platforms deteriorate

Engineering Contradiction:
ImproveCPU task managementVSAvoidtiming guarantees on heterogeneous hardware
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The scheduling system implements a universal time slot assignment mechanism that works across multiple types of compute engines (CPUs, GPUs, accelerators). By assigning time slots in a unified manner rather than using engine-specific scheduling policies, the system maintains consistency and timing guarantees across heterogeneous hardware platforms while simplifying task management through a single centralized scheduler.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system changes the scheduling parameter from priority-based preemptive scheduling to time slot-based non-preemptive scheduling. This parameter change enables deterministic timing guarantees by eliminating the complexity of priority inversion and preemption overhead, while the time slots can be dynamically assigned to accommodate different hardware engine characteristics.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If static scheduling is used, then timing determinism is improved, but adaptability to heterogeneous hardware platforms deteriorates

Engineering Contradiction:
Improvetiming determinismVSAvoidoptimization across heterogeneous hardware
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The scheduling system combines static time slot assignment with dynamic task assignment. Time slots are predetermined and fixed in sequence, providing timing determinism, but the mapping of tasks to time slots is dynamic and can be optimized for each heterogeneous hardware platform. This allows the system to maintain determinism while adapting to different hardware configurations through runtime task scheduling decisions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12596571B2Instruction sets for generating schedules for task execution in computing systems
Publication Date: 2026.04.07 NVIDIA CORP
  • US12596571B2 patent drawing
  • US12596571B2 patent drawing
  • US12596571B2 patent drawing

AI summary

One or more embodiments of the present disclosure relate to receiving application data indicative of a plurality of runnables corresponding to a computing application. Additionally, one or more embodiments may relate to generating, based at least on the application data, an execution schedule for execution of the plurality of runnables using a plurality of compute engines. The execution schedule may include one or more commands corresponding to one or more timing fences. The one or more timing fences may dictate a timing and order of execution between at least a first runnable and a second runnable of the plurality of runnables.