Compute Unit Startup Control for IC Voltage Droop Mitigation
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Solution Overview
Problem
Inductive-induced voltage droop and overshoot in integrated circuits cause operational failures due to large current ramps, which existing solutions like clock stretching negatively impact performance and incur additional costs.
Innovation Solution
An integrated circuit with control circuitry that enforces a staggered startup of compute units to mitigate current ramps, using a compiler to generate configuration information for static reconfiguration and group compute units to manage current changes, thereby reducing voltage fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If clock stretching is used to reduce current ramp rate, then voltage droop is mitigated, but performance and productivity deteriorate
Solution Approach 1:
The compute units are divided into multiple groups, and within each group, they are further segmented into sub-groups with different activation thresholds. This hierarchical segmentation allows gradual activation of compute units based on current ramp rate, mitigating voltage droop without requiring overall clock stretching. The patent implements this by dividing N compute units into G groups, with each group containing multiple sub-groups that activate at different current thresholds.
Solution Approach 2:
The system dynamically adjusts the activation of compute units based on real-time monitoring of current ramp rate. When the current ramp rate exceeds a threshold, the control circuitry dynamically prevents further compute units from activating until the ramp rate decreases. This dynamic control allows the system to maintain high performance during normal operation while automatically reducing activation rate during critical periods to prevent voltage droop.
2Reliability
If additional circuitry is added for dynamic clock stretching, then voltage droop is mitigated, but device complexity increases
Solution Approach 1:
The control circuitry integrates multiple functions into a single unified structure that monitors current ramp rate, manages compute unit grouping, and controls activation sequences. This multi-functional approach eliminates the need for separate dedicated circuits for each control function, reducing overall device complexity while maintaining voltage stability. The patent implements this through a unified control circuit that handles threshold comparison, group management, and activation control in an integrated manner.
3Productivity
If compute units are activated simultaneously for high productivity, then current ramp rate increases causing voltage droop, but if activated sequentially then productivity decreases
Solution Approach 1:
The system implements periodic activation of compute units in a controlled sequence rather than simultaneous activation. Compute units are activated in periodic batches based on their group assignments and sub-group thresholds, creating a structured periodic pattern of current draw. This periodic activation maintains high overall productivity while preventing dangerous current ramp rates by spacing out activation events across different time periods.
Solution Approach 2:
The system changes the activation parameter from binary (all-or-nothing simultaneous activation) to a multi-level hierarchical structure with groups and sub-groups having different activation thresholds. This parameter transformation allows the system to maintain the benefit of parallel activation within groups while spreading activation across multiple time periods through the hierarchical threshold structure, thereby maintaining productivity while ensuring voltage stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively mitigates voltage droop and overshoot without performance degradation, providing efficient and cost-effective operation by statically reconfiguring the integrated circuit to manage current ramps.
Implementation Method 1
the voltage drop across an inductive load is the product of the inductance of the load and the time rate of change of the current drawn through the inductive loads, which may be expressed in equation (1) below in which L is the inductance of the load and di/dt is the first derivative of the current with respect to time through the load
Data Source
AI summary
An integrated circuit (IC) includes an array of compute units. Each compute unit is configured such that, when transitioning from not processing data to processing data, the compute unit makes an individual contribution to an aggregate time rate of change of current drawn by the IC. Control circuitry is configurable to, for each compute unit of the array of compute units, control when the compute unit is eligible to transition from not processing data to processing data relative to when the other compute units start processing data to mitigate supply voltage droop caused by the aggregate time rate of change of current drawn by the IC through inductive loads of the IC.