Compute Unit BIST Instances for Silent Data Corruption Detection

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Solution Overview

Problem

Computer chips, such as system-on-chips, multi-chip modules, or accelerators, contain subtle defects like voids, cracking, resistive metal shorts, or transistor voltage shifts that are difficult to detect during testing, leading to data computation errors and potential larger issues in product usability.

Innovation Solution

A built-in self-testing (BIST) controller is used to generate random strings of bits, provide them to compute units, receive results, compress them into signatures, and compare with expected signatures to detect defects in compute units like matrix multiplication units (MXUs) or vector processing units (VPUs).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional testing methods are used to detect defects in compute units, then the testing process is simple to implement, but subtle defects like voids, cracking, resistive metal shorts, or transistor voltage shifts cannot be detected

Engineering Contradiction:
Improvedefect detection capabilityVSAvoidtesting system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The BIST controller enables the compute unit to test itself by generating test input data, processing it through the compute unit, and comparing the output against expected results. This self-testing mechanism detects subtle defects without requiring external testing equipment, thereby improving reliability while avoiding the complexity of external test systems.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The BIST controller performs testing operations before the compute unit is deployed or during idle periods. Test patterns are generated and applied in advance to detect potential defects early, preventing faulty units from being deployed and causing issues in production environments.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If multiple instances of BIST controller are used to test high-bandwidth compute units, then testing accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvetesting accuracyVSAvoidnumber of BIST controller instances
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The BIST controller is divided into multiple independent instances, with each instance responsible for testing a specific portion of the compute unit's output. This segmentation allows parallel testing of different data streams, improving measurement precision by covering the entire high-bandwidth output without requiring a single overly complex testing mechanism.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4607357A1Instances for built-in self testing
Publication Date: 2025.08.27 GOOGLE LLC
  • EP4607357A1 patent drawingFigure 1
  • EP4607357A1 patent drawingFigure 2
  • EP4607357A1 patent drawingFigure 3

AI summary

Aspects of the disclosure are directed to built-in self-testing instances for detecting defects in a compute unit of a computer chip. Each instance can correspond to a calculation portion of the compute unit, such as data column of a matrix multiplication unit. The instances can include data generators for generating random bits, data shapers for customizing the random bits, and data compactors for generating signatures to determine if the compute unit is outputting the correct results. The instances can account for potentially massive data bandwidth of the compute unit since each instance can perform independent testing for respective calculation portions of the compute unit.