Compute Unit BIST Instances for High-Bandwidth Defect Detection
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Solution Overview
Problem
Computer chips, such as system-on-chips, multi-chip modules, or accelerators, contain subtle defects like voids, cracking, resistive metal shorts, or transistor voltage shifts that are difficult to detect during testing, leading to data computation errors and potential larger issues in product usability.
Innovation Solution
A built-in self-testing (BIST) controller is used to generate random strings of bits, convert them into data streams, and compare results with expected signatures to detect defects in compute units like matrix multiplication units (MXUs) or vector processing units (VPUs), utilizing multiple instances to manage high data bandwidth and simulate operations for quick defect detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional testing methods are used, then manufacturing cost is reduced, but defect detection capability deteriorates
Solution Approach 1:
The compute unit performs self-testing by generating random input data, processing it through its own computation paths, and comparing results against expected values. The BIST controller enables the compute unit to autonomously detect defects in its own operation without requiring external testing equipment, thereby improving defect detection capability while avoiding the complexity of separate testing systems.
Solution Approach 2:
The system pre-generates random input data and expected result values before the compute unit operates. By having test data ready in advance and comparing actual outputs against pre-computed expected values, the system can immediately detect deviations indicating defects, enhancing reliability without requiring complex real-time analysis infrastructure.
2Measurement precision
If multiple BIST instances are deployed to handle high data bandwidth, then defect detection accuracy is improved, but device complexity increases
Solution Approach 1:
The BIST controller is divided into multiple independent instances, each responsible for testing specific data paths or computation units. Each instance independently generates random data, processes it through designated compute units, and compares results against expected values. This segmentation enables parallel defect detection across high-bandwidth data paths, improving measurement precision while keeping each individual instance relatively simple.
3Reliability
If comprehensive testing of all compute units is performed, then reliability is improved, but testing time increases
Solution Approach 1:
The BIST controller continuously generates random test data and processes it through compute units in an ongoing manner rather than performing discrete batch tests. This continuous operation allows for persistent monitoring of compute unit reliability without requiring periodic shutdowns for comprehensive testing, thereby maintaining reliability while minimizing testing time overhead.
Data Source
AI summary
Aspects of the disclosure are directed to built-in self-testing instances for detecting defects in a compute unit of a computer chip. Each instance can correspond to a calculation portion of the compute unit, such as data column of a matrix multiplication unit. The instances can include data generators for generating random bits, data shapers for customizing the random bits, and data compactors for generating signatures to determine if the compute unit is outputting the correct results. The instances can account for potentially massive data bandwidth of the compute unit since each instance can perform independent testing for respective calculation portions of the compute unit.


