Compute Unit Grouping to Mitigate IC Supply Voltage Deviation
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Solution Overview
Problem
Integrated circuits experience operational failures due to inductive load-induced voltage droop and overshoot, which are exacerbated by high parallelism in computation units, and existing solutions like clock stretching negatively impact performance and incur additional costs.
Innovation Solution
Implement a control circuitry in the integrated circuit that enforces a staggered startup of compute units within a given time window, grouping them to manage current ramps and mitigate voltage fluctuations through static reconfiguration based on configuration information generated by a compiler.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If compute units are activated in high parallelism to improve processing throughput, then productivity increases, but voltage droop occurs due to large current ramps
Solution Approach 1:
The patent segments the compute units into multiple groups and activates them in a staggered manner rather than all at once. This segmentation of the activation process reduces the aggregate current ramp while maintaining overall productivity by ensuring continuous processing across groups.
Solution Approach 2:
The patent implements periodic activation of compute unit groups with controlled delays between group activations. This periodic staggering of compute unit activation reduces simultaneous current draw while maintaining processing throughput across the integrated circuit.
2Reliability
If clock stretching is applied to reduce current ramp rate, then voltage droop is mitigated, but performance deteriorates and additional costs are incurred
Solution Approach 1:
Instead of globally stretching the clock signal which reduces performance, the patent segments compute units into groups with different activation timings. This allows the clock to maintain its original frequency while reducing voltage droop through controlled staggered activation of segments.
Solution Approach 2:
The patent applies different activation characteristics to different compute unit groups rather than uniformly affecting all units. This local differentiation allows voltage stability without globally degrading performance through clock stretching.
3Reliability
If compute units are grouped and staggered in activation to reduce current ramps, then voltage droop is mitigated, but device complexity increases due to control circuitry
Solution Approach 1:
The control circuitry is integrated within the existing compute unit structure, allowing the system to self-regulate its activation pattern. Each compute unit group contains the necessary control logic to autonomously manage its activation timing based on group identifiers, reducing the need for external complex control mechanisms.
Data Source
AI summary
An integrated circuit (IC) includes an array of reconfigurable compute units organized into mutually exclusive groups. Each group includes no more than a reconfigurable number of reconfigurable compute units. Each compute unit includes group identifier circuitry and control circuitry configured to prevent the compute unit from starting to process data until a signal associated with a reconfigurable group identifier of the reconfigurable compute unit is received from the group identifier circuitry, where the reconfigurable group identifier identifies which group of the mutually exclusive groups the compute unit belongs to. According to operation of the group identifier circuitry and the control circuitry, no more than the reconfigurable number of the reconfigurable compute units are allowed to start processing data concurrently to mitigate supply voltage deviation caused by a time rate of change of current drawn by the IC through inductive loads of the IC.