In-Operation Computer Reset Device Verification
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Solution Overview
Problem
Existing methods fail to effectively test the correct operation of a reset device for computers in critical environments, such as engine control computers, particularly after manufacture, and do not verify the correctness of the reset function during or after its execution.
Innovation Solution
A method for in-situ testing of the reset device during computer operation, involving an execution sequence to trigger a reset and a verification sequence to check the test counter and reset duration, ensuring the reset is executed correctly and within a threshold time, with optional features like using a test indicator and warning signals for errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the reset device is tested after manufacture according to prior art, then the initial functionality is verified, but no further testing is performed and reliability cannot be ensured during operation
Solution Approach 1:
The reset device tests itself by autonomously triggering a reset and verifying its own operation through the test counter mechanism, eliminating the need for external testing systems during operation
Solution Approach 2:
The verification sequence reads the test counter and provides feedback on whether the reset operation was successful, enabling continuous reliability verification during operation
2Reliability
If the reset function is tested during computer operation, then real-time reliability verification is achieved, but the testing process must be integrated into the operating system
Solution Approach 1:
The testing method is divided into separate execution sequence and verification sequence that can be independently implemented and maintained, reducing integration complexity
Solution Approach 2:
The test counter is incremented and stored in non-volatile memory before the reset is triggered, preparing the test state in advance so that verification can simply read and compare values after reset
Data Source
AI summary
A method for testing, in situ and in operation, a reset device for resetting a computer, including an execution sequence and a verification sequence, the execution sequence being executed during the running of the piece of software and including the following steps: incrementing a test counter, storing the test counter in a non-volatile memory, triggering a reset of the computer, the verification sequence being executed when starting the piece of software and including the following steps: reading the test counter from the non-volatile memory, comparing the test counter: if it is equal to its initial value increased by 1, resetting the test counter, and the test result is positive; and if it is greater than its initial value increased by 1, the test result is negative.