Computer Wake-Up Circuit Using Embedded Controller and Switch Logic

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Computers dissipate excessive power when not in a power-saving state, leading to inefficiency and reduced battery life, as existing power management standards do not effectively transition between working, standby, and shutdown states to minimize power consumption.

Innovation Solution

A computer system comprising a switch circuit, chipset, and embedded controller with specific wake-up pins and an opportunistic buffer flush/fill mechanism to manage power states, allowing the system to enter power-saving modes while maintaining data integrity and efficiently waking up the computer when necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the computer remains in working state to maintain data access and responsiveness, then usability and response time are improved, but power consumption increases

Engineering Contradiction:
ImproveusabilityVSAvoidpower consumption
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The system dynamically transitions between working state and power-saving state based on activity detection. The embedded controller monitors system activity and automatically switches the computer to power-saving state when no activity is detected, and wakes it up when activity is detected, making the power state adaptive rather than static

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs preliminary actions by detecting user activity in advance and transitioning to appropriate power states before actual power consumption becomes an issue. The embedded controller proactively monitors and triggers state transitions based on detected activity patterns

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If the computer enters power-saving state to reduce power consumption, then energy efficiency is improved, but wake-up response time may be delayed

Engineering Contradiction:
Improvepower consumptionVSAvoidwake-up response time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The embedded controller acts as an intermediary that remains active or in a light sleep state to monitor for wake-up events while the main system is in power-saving state. When a wake-up event is detected, it quickly activates the main system, reducing the effective wake-up time without requiring the entire system to remain fully powered

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system is segmented into different power management components with different power states. The embedded controller can operate in a lower power state while still being capable of detecting wake-up events and initiating system wake-up, separating the monitoring function from the main computing function

Inventive Principle:
Principle #1Segmentation

3Loss of energy

If the computer shuts down completely to minimize power dissipation, then power saving is improved, but data access and system responsiveness are lost

Engineering Contradiction:
Improvepower dissipationVSAvoiddata access capability
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

Different components of the system are placed in different power states simultaneously. Critical components needed for wake-up detection and basic functionality remain powered or in light sleep state, while non-critical components are powered down, creating local variations in power state across the system

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9146606B2Computer and waking method thereof
Publication Date: 2015.09.29 WISTRON CORP
  • US9146606B2 patent drawing
  • US9146606B2 patent drawing
  • US9146606B2 patent drawing

AI summary

A computer and a waking method thereof are provided. The computer includes a switch circuit, a chipset, a peripheral component interconnect express (PCIE) device, and an embedded controller. The chipset includes a first wake-up pin and a power button pin, wherein the first wake-up pin is coupled to a terminal of the switch circuit. The PCIE device includes a second wake-up pin, and the embedded controller includes a general purpose input pin and a general purpose output pin. The general purpose input pin and the second wake-up pin are coupled to another terminal of the switch circuit. The general purpose output pin is coupled to the power button pin.