Computing Node Interconnects via Parallel High-Radix Switch Links

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Solution Overview

Problem

Existing high-speed data communication networks face challenges in efficiently interconnecting large numbers of computing nodes due to the tradeoff between network device radix and bandwidth, limiting the flattening of network topology and increasing latency and power consumption.

Innovation Solution

Implementing a system with high-radix network switches that utilize parallel transmission of low-bandwidth data streams without serialization or deserialization, using optical transceivers for communication between computing nodes and switches via free-space or optical cables, enabling efficient interconnection of computing nodes in datacenters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If SerDes is used to convert multiple parallel data streams into a single high-bandwidth serial channel, then transmission bandwidth is improved, but network device complexity and latency increase

Engineering Contradiction:
Improvetransmission bandwidthVSAvoidnetwork device complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent divides the network into multiple parallel low-bandwidth channels instead of using a single high-bandwidth serial channel. Each computing node has multiple network interface cards (NICs) that transmit data streams in parallel through separate network switches, avoiding the need for SerDes serialization/deserialization at network devices and reducing device complexity.

Inventive Principle:
Principle #1Segmentation

2Productivity

If SerDes is used to transmit high-bandwidth serial channels, then transmission efficiency is improved, but latency increases

Engineering Contradiction:
Improvetransmission efficiencyVSAvoidlatency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

Data transmission is segmented into multiple parallel low-bandwidth channels that can be transmitted simultaneously without serialization overhead. This parallel transmission approach eliminates the time required for SerDes conversion processes, reducing latency while maintaining overall transmission efficiency through concurrent data flow.

Inventive Principle:
Principle #1Segmentation

3Speed

If network topology is flattened to reduce latency, then speed is improved, but the tradeoff between radix and bandwidth limits the degree of flattening

Engineering Contradiction:
ImprovelatencyVSAvoidradix-bandwidth tradeoff
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The network is segmented into multiple parallel paths with lower individual bandwidth requirements, enabling network switches to have higher radix (more ports) without requiring each port to support extremely high bandwidth. This allows for greater network topology flattening with multiple layers of switches, reducing latency through shorter transmission paths.

Inventive Principle:
Principle #1Segmentation

4Loss of time

If high-radix network switches are used to flatten network topology, then latency is reduced, but bandwidth requirements per channel increase

Engineering Contradiction:
ImprovelatencyVSAvoidbandwidth per channel
Core Design Contradiction:
Loss of timeVSSpeed

Solution Approach 1:

The total bandwidth requirement is segmented across multiple parallel channels with lower individual bandwidth demands. This allows network switches to be designed with higher radix (more connection points) while maintaining moderate bandwidth per port, achieving network topology flattening without requiring extremely high bandwidth per channel.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12356126B2Efficiently interconnecting computing nodes to enable use of high-radix network switches
Publication Date: 2025.07.08 MICROSOFT TECHNOLOGY LICENSING LLC
  • US12356126B2 patent drawing
  • US12356126B2 patent drawing
  • US12356126B2 patent drawing

AI summary

A system for efficiently interconnecting computing nodes can include a plurality of computing nodes and a plurality of network switches coupled in parallel to the plurality of computing nodes. The system can also include a plurality of node interfaces. Each computing node among the plurality of computing nodes can include at least one node interface for each network switch among the plurality of network switches. The plurality of node interfaces corresponding to a computing node can be configured to send data to another computing node via the plurality of network switches. The system can also include a plurality of switch interfaces. Each network switch among the plurality of network switches can include at least one switch interface for each computing node among the plurality of computing nodes. A switch interface corresponding to the computing node can be coupled to a node interface corresponding to the computing node.