Conductive Lines with Concave Ends for Reduced Line End Space
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Solution Overview
Problem
The existing methods for fabricating integrated circuit devices are limited by the large line end space between conductive lines with convex ends, which restricts routing density and is not suitable for advanced technology nodes like N20, N16, N10, and N7, due to etching process biases and patterning variations.
Innovation Solution
The method involves forming conductive lines with concave ends using a line cut process that reduces the line end space between them, achieved through multiple lithography and etching processes, allowing for increased routing density without considering etching bias and patterning variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography and etching processes are used to form conductive lines, then the manufacturing process is simple, but the line end space between conductive lines is large, reducing routing density
Solution Approach 1:
The fabrication process is divided into multiple sequential stages: forming mandrels with initial patterns, depositing first spacers, removing mandrels, depositing second spacers, and selective removal. This segmentation allows precise control of line end spaces by independently optimizing each stage, achieving reduced line end space while managing process complexity through systematic breakdown of the fabrication sequence
Solution Approach 2:
Mandrels are formed in advance with patterns that anticipate the final conductive line configuration. The mandrels serve as pre-positioned templates that guide subsequent spacer deposition, ensuring that the final conductive lines achieve the desired reduced line end space before the actual conductive material is deposited
2Productivity
If convex line-ends are used in conductive lines, then the manufacturing process is straightforward, but the line end space is large which restricts routing density for advanced technology nodes
Solution Approach 1:
The invention transforms the conventional convex line-end geometry into concave line-ends through the spacer formation process. The curved, recessed geometry of the concave ends reduces the space occupied at line terminations, enabling higher routing density while the systematic spacer deposition ensures precise and consistent formation of this curved geometry across all conductive lines
Solution Approach 2:
The invention changes the geometric parameter of line-end shape from convex to concave, fundamentally altering the space occupation characteristics. This parameter change is achieved through controlled spacer deposition and removal processes that systematically transform the line-end geometry, enabling reduced line end space and increased routing density for advanced technology nodes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the line end space by more than 50% compared to convex line-end configurations, enhancing conductive lines' routing efficiency and density, making it suitable for advanced IC technology nodes.
Implementation Method 1
forming a patterned photoresist on the patterned first hard mask
Implementation Method 2
etching the first hard mask layer to form a patterned first hard mask
Data Source
AI summary
Methods of fabricating an integrated circuit device are provided. The method includes depositing a dielectric layer and a first hard mask layer in sequence over a substrate. The method also includes forming a patterned second hard mask on the first hard mask layer, and forming a third hard mask portion in an opening of the patterned second hard mask. The method further includes removing the patterned second hard mask to leave the third hard mask portion on the first hard mask layer, and etching the first hard mask layer to form a patterned first hard mask. In addition, the method includes etching the dielectric layer by using the patterned first hard mask as an etching mask to form trenches in the dielectric layer, and filling the trenches with a conductive material to form conductive lines.