Concave-Sidewall Via Metallization for Continuous Conductive Films
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Solution Overview
Problem
The semiconductor industry faces challenges in manufacturing high-aspect-ratio vias with scallop-like sidewalls, which can lead to discontinuous metal layers and increased complexity in processing, affecting the reliability and efficiency of semiconductor devices used in photolithography and beam deflection applications.
Innovation Solution
A method involving a pre-passivation liner layer and a cyclic deposition and etching process to form a thicker conductive layer on the sidewalls of vias, ensuring a continuous and robust metal film while maintaining a thinner metal film in field areas, thereby addressing the issue of wall scalloping and enhancing the structural integrity of semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a standard deposition process is used to form metal layers in high-aspect-ratio vias, then the processing is simpler, but the metal layer becomes discontinuous and unreliable
Solution Approach 1:
The deposition process is segmented into multiple cycles of deposition and etching steps, where each cycle builds upon the previous one to progressively form a continuous metal layer. This segmented approach allows the metal layer to be formed reliably in high-aspect-ratio vias by addressing the continuity issue in staged increments rather than attempting a single-step deposition.
Solution Approach 2:
The patent employs periodic action through cyclic repetition of deposition and etching steps. The process alternates between depositing metal material and performing selective etching, repeating this cycle multiple times to gradually build up a continuous and reliable metal layer throughout the high-aspect-ratio via structure.
2Reliability
If a thicker metal protection layer is formed in high-aspect-ratio vias, then beam deflection reliability improves, but the metal film becomes discontinuous in field areas
Solution Approach 1:
The patent applies local quality by making the metal layer thickness location-dependent. Through selective deposition and etching cycles, the process ensures that high-aspect-ratio via regions receive thicker metal protection layers for reliable beam deflection, while field areas maintain appropriate metal film continuity without excessive thickness. This localized differentiation resolves the contradiction between needing thick protective layers and maintaining overall film continuity.
3Ease of manufacture
If conventional etching is used to form vias, then the via structure is created, but scallop-like sidewalls are formed causing manufacturing issues
Solution Approach 1:
The patent employs continuous useful action through a cyclic process where deposition and etching steps are seamlessly integrated. The deposition phase continuously builds material to fill and smooth scallop-like sidewall features, while the etching phase continuously removes excess material. This continuous cyclic action prevents scallop formation by maintaining smooth sidewalls throughout the via formation process, resolving the contradiction between via formation capability and sidewall smoothness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a semiconductor device with a robust conductive layer that prevents damage from light beams and ensures reliable beam deflection, while also improving manufacturing efficiency by smoothing the surface and preventing discontinuous metal layers.
Implementation Method 1
performing a cyclic deposition and etching process to form a conductive layer on the sidewall of the at least one via
Data Source
AI summary
A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.