Memory Device with Concentric Gates for Dense Quantum Dot Arrays
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Solution Overview
Problem
The challenge of forming reliable semiconductor devices at smaller sizes is exacerbated by the increasing complexity and difficulty of fabrication processes as feature sizes continue to decrease, necessitating improved manufacturing methods for quantum computing qubits.
Innovation Solution
A novel 2D architecture of quantum dot arrays with enhanced density is developed, utilizing a concentric arrangement of barrier and plunger gates to define qubits compatible with very large-scale integration technologies, enabling a large-scale spin qubit system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency and cost are improved, but fabrication process difficulty and reliability increase
Solution Approach 1:
The fabrication process is divided into multiple sequential steps: forming first and second trenches at different depths, selectively filling with different materials, and creating distinct barrier gate and plunger gate structures. This segmentation allows each step to be optimized independently, maintaining reliability while achieving high density
Solution Approach 2:
The patent transitions from planar 2D transistor structures to 3D vertical structures with trenches extending into the substrate at different depths. The first trench extends to a first depth while the second trench extends to a greater second depth, creating a three-dimensional architecture that increases functional density without reducing feature size
2Area of stationary object
If feature sizes continue to decrease to increase functional density, then chip area utilization is improved, but manufacturing complexity increases
Solution Approach 1:
The device structure is segmented into multiple functional regions: first trench regions containing first gates, second trench regions containing second gates, and intermediate regions. This segmentation allows for modular fabrication where each trench type can be formed and filled using standardized processes, reducing overall manufacturing complexity despite high density
Solution Approach 2:
The first trench is formed and filled with barrier gate material before forming the second trench. This preliminary action establishes a foundation structure that guides subsequent processing steps, simplifying the overall fabrication sequence while achieving complex 3D architecture
Data Source
AI summary
A memory device includes a substrate. A gate dielectric layer is over the substrate. A first plunger gate structure and a second plunger gate structure are over the gate dielectric layer, wherein in a top view the first and second plunger gate structures are arranged concentrically, and wherein each of the first and second plunger gate structures comprises a ring structure and plunger gates extend downwardly from the ring structure. Barrier gates are over the gate dielectric layer, wherein in a cross-sectional view each of the plunger gates of the first and second plunger gate structures is laterally between adjacent two of the barrier gates.