Concurrent Boot Code Transfer via DMA Controller

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Solution Overview

Problem

Conventional boot code loading techniques sequentially transfer boot code from non-volatile memories to volatile memory, leading to delayed boot processes and inefficient utilization of system resources due to slower data-transfer speeds of non-volatile memories compared to system buses.

Innovation Solution

Implementing a method where a boot manager uses a DMA controller to concurrently transfer portions of boot code from multiple non-volatile memories to a volatile memory via a system bus, allowing for simultaneous execution without waiting for individual transfers to complete, thereby optimizing resource utilization and reducing boot time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If boot code is transferred sequentially from non-volatile memories to volatile memory, then the transfer process is simple to implement, but the boot time is delayed and system resource efficiency is reduced

Engineering Contradiction:
Improveboot speedVSAvoidtransfer control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The boot code is divided into multiple portions stored in different non-volatile memories. Each portion is transferred independently through separate DMA operations, allowing parallel execution of transfers and improving boot speed without requiring complex coordinated control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system pre-configures multiple DMA transfer operations before execution. Each DMA operation is set up in advance with its source, destination, and parameters, enabling the controller to initiate multiple transfers simultaneously without real-time coordination complexity.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If multiple portions of boot code are transferred concurrently from multiple non-volatile memories, then boot time is reduced and resource efficiency increases, but the control mechanism becomes more complex

Engineering Contradiction:
Improveboot delayVSAvoidDMA operation configuration
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The DMA controller autonomously manages multiple transfer operations once configured. It independently initiates, monitors, and completes each transfer without requiring processor intervention or complex control logic, reducing the effective complexity despite concurrent operations.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

Multiple DMA transfer operations are merged into a single coordinated process managed by the DMA controller. The controller handles multiple sources and destinations simultaneously through unified control logic, simplifying the overall management of concurrent transfers.

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If sequential transfer operations are used, then the system uses fewer data interfaces, but the data transfer speed is limited by non-volatile memory speeds

Engineering Contradiction:
Improvedata transfer speedVSAvoiddata interface quantity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system transitions from sequential (one-dimensional) transfer to parallel (multi-dimensional) transfer by utilizing multiple data interfaces simultaneously. Each interface operates independently to transfer different portions of boot code, effectively increasing the throughput dimension without requiring exponentially more interfaces.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9575768B1Loading boot code from multiple memories
Publication Date: 2017.02.21 MARVELL ASIA PTE LTD
  • US9575768B1 patent drawing
  • US9575768B1 patent drawing
  • US9575768B1 patent drawing

AI summary

The present disclosure describes apparatuses and techniques for loading boot code from multiple memories. In some aspects a transfer operation transferring a portion of boot code from a memory of a first type is initiated prior to completion of another transfer operation transferring another portion of the boot code from another memory of the first type. This can be effective to enable concurrent transfers of boot code from multiple memories of the first type into a memory of a second type for execution. By so doing, a speed at which boot code is transferred into the memory of the second type is increased, which may result in decreased device boot times.