Concurrent Command Limiter for Memory Subsystem
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Solution Overview
Problem
Memory devices, such as 3D cross-point memory devices, are limited in the number of commands they can process concurrently, leading to command failures and performance issues due to exceeding their processing capacity, with the host system often unaware of failed commands or receiving delayed notifications.
Innovation Solution
A concurrent command limiter is implemented within the memory sub-system controller, using a counter to track executed commands and an expected completion table to anticipate when commands are complete, allowing the system to limit incoming commands and notify the host system when processing limits are reached, preventing excess commands and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the memory device processes commands without a limiter, then the host system can continuously issue commands, but the memory device exceeds its concurrent command capacity leading to command failures
Solution Approach 1:
A concurrent command limiter is introduced as an intermediary component between the host system and the memory device. The limiter tracks the number of concurrent commands using a counter and an expected completion table, and actively manages command flow by preventing the host from issuing commands when the memory device is at capacity. This mediator resolves the contradiction by filtering and regulating commands to match the memory device's processing capacity while maintaining high throughput through efficient command management.
2Stability of the object's composition
If the memory device has a limited concurrent command capacity, then the device can maintain stable operation, but the host system becomes unaware of failed commands or receives delayed notifications
Solution Approach 1:
The concurrent command limiter implements a feedback mechanism that continuously monitors the number of concurrent commands and notifies the host system when the memory device reaches its command capacity. The limiter uses a counter to track active commands and an expected completion table to anticipate when commands will finish, providing timely feedback about command status and processing limits to the host system, thereby preventing information loss about command failures or delays.
3Productivity
If the host system sends more commands than the memory device can process, then the host system maintains high command issuance rate, but commands fail and may need to be resent
Solution Approach 1:
The concurrent command limiter performs preliminary action by tracking the number of concurrent commands before the memory device can actually process them. It uses a counter that increments when commands are received and decrements when commands are expected to complete, allowing the host system to be notified in advance when the memory device is at capacity. This prevents command failures before they occur, eliminating the need for resends and reducing time loss.
Data Source
AI summary
A system can include a memory device and a processing device coupled with the memory device. The processing device can receive, from a host system, a command of a type; determine a weighted count of the command according to the type of the command; track, based on the weighted count, a first count of commands of the type; determine whether the first count of commands of the type satisfies a threshold criterion for commands of the type; and responsive to determining that the first count of commands of the type satisfies the threshold criterion, transmit a notification to the host system to refrain from transmitting commands of the type.