Concurrent Dummy Data Programming for Memory Retired Wordlines
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Solution Overview
Problem
The inefficiency of sequentially programming retired wordline cells with dummy data in memory devices leads to performance degradation and increased latency, as the host system must wait for each dummy data write operation to complete before writing host data to active cells.
Innovation Solution
Implementing concurrent programming of retired wordline cells with dummy data using a ganged programming pulse, which allows multiple pages of cells across multiple sub-blocks to be simultaneously programmed with dummy data, reducing the number of programming pulses required and minimizing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If sequential programming of retired wordline cells with dummy data is used, then programming precision is maintained, but productivity deteriorates due to increased latency and performance degradation
Solution Approach 1:
The patent merges the programming operations for retired wordline cells with dummy data into a concurrent operation that executes simultaneously with host data programming to active cells. This is achieved by integrating the dummy data programming into the same programming pulse sequence used for active cells, eliminating the need for separate sequential programming operations and thereby maintaining productivity while ensuring programming precision through the same verification processes.
Solution Approach 2:
The patent performs preliminary identification and marking of retired wordline cells before the programming operation. By pre-configuring which cells require dummy data programming and organizing the data structure in advance, the system can execute concurrent programming without compromising precision, as the preliminary preparation ensures that verification and validation steps are already in place before the actual programming begins.
2Device complexity
If sequential programming of retired wordline cells is implemented, then device complexity is reduced, but loss of time increases due to waiting for each dummy data write operation to complete
Solution Approach 1:
The patent combines multiple programming operations into a single concurrent execution framework. Retired wordline cell programming and active cell programming are merged into the same operational sequence, allowing the system to utilize existing programming infrastructure without adding significant complexity while dramatically reducing the total time required by eliminating sequential waiting periods.
Solution Approach 2:
The patent ensures continuous useful action by maintaining the programming operation throughout the entire process without idle waiting periods. The programming pulse sequence continuously programs both retired and active cells without interruption, maximizing the utilization of programming resources and eliminating time loss associated with sequential completion and waiting.
3Productivity
If concurrent programming of retired wordline cells with dummy data is implemented, then productivity is improved by reducing programming time, but device complexity increases due to coordination requirements
Solution Approach 1:
The patent implements a universal programming interface and control mechanism that handles both retired wordline cells and active cells through the same command structure and verification process. This multi-functional approach allows concurrent programming of different cell types without requiring separate complex control logic, thereby improving productivity while minimizing the increase in device complexity.
Solution Approach 2:
The patent introduces an intermediary control layer that coordinates the concurrent programming operations. This intermediary manages the timing and sequencing of programming pulses for both retired and active cells, ensuring proper synchronization without requiring direct complex interactions between the programming subsystems. The intermediary acts as a mediator that simplifies the coordination complexity while enabling concurrent operation.
Data Source
AI summary
A system includes a memory device including a memory array and processing logic, operatively coupled with the memory array, to perform operations including identifying a set of cells of the memory array to be programmed with dummy data, and concurrently programming the set of cells with the dummy data by causing a ganged programming pulse to be applied to the set of cells.