Concurrent Memory Block Sensing via Selector Isolation
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Solution Overview
Problem
Existing methods for reading and programming memory blocks in flash memory devices are inefficient, particularly in NAND flash memory devices, where simultaneous access and data retrieval from multiple blocks are not effectively managed, leading to issues like program disturb and data isolation challenges.
Innovation Solution
The implementation of selector memory cells and specific voltage configurations across different blocks allows for concurrent sensing and programming operations by isolating untargeted memory cells from data lines, enabling efficient data retrieval and minimizing program disturb through strategic voltage application on selector word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory blocks are accessed sequentially using traditional methods, then data retrieval is simple to manage, but operational efficiency and productivity are low
Solution Approach 1:
The memory array is divided into multiple independent blocks, each with its own set of selector memory cells and data lines. This segmentation allows concurrent access to multiple blocks without interference, as each block can be independently selected and accessed through its dedicated selector cells and data line connections.
Solution Approach 2:
Selector memory cells are introduced as intermediary elements between the data lines and the memory cells in each block. These selector cells act as controlled switches that determine which memory cells are connected to which data lines, enabling flexible and concurrent access patterns across multiple blocks while maintaining isolation when needed.
2Productivity
If multiple memory blocks are accessed simultaneously, then productivity improves, but program disturb and data isolation challenges increase
Solution Approach 1:
The selector memory cells are extracted as separate controllable elements that can be independently programmed to either connect or isolate memory cells from data lines. By taking out this selection function into dedicated selector cells, the system can precisely control which blocks participate in concurrent operations, preventing program disturb by excluding unselected blocks from voltage application.
Solution Approach 2:
Different blocks can have different selector cell states (programmed or erased) to create local variations in connectivity. This allows each block to have customized access characteristics - selected blocks are connected to data lines for concurrent access, while unselected blocks are isolated through their selector cells being in a state that prevents connection, thus maintaining data integrity.
3Ease of operation
If all memory cells are connected to data lines, then ease of operation is high, but program disturb increases due to lack of isolation
Solution Approach 1:
Selector memory cells serve as intermediary controlled connections between memory cells and data lines. These selector cells can be programmed to create or break connections as needed, providing isolation for unselected blocks during concurrent operations. This maintains ease of operation for selected blocks while preventing program disturb in unselected blocks through the intermediary blocking action of the selector cells.
Data Source
AI summary
In an embodiment, a target memory cell in a first block of memory cells of a memory device and a target memory cell in a second block of memory cells of the memory device are sensed concurrently while a read voltage is applied to a selected access line coupled to the target memory cell in the first block of memory cells and while a read voltage is applied to another selected access line coupled to the target memory cell in the second block of memory cells.