Concurrent PAM and NRZ Memory Paths for Faster Data Transfer
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Solution Overview
Problem
Current memory devices face limitations in increasing memory cell density, read/write speeds, data retention, power consumption, and manufacturing costs, particularly in efficiently transferring data across multiple channels using different signaling techniques.
Innovation Solution
Implementing a memory system that supports multiple concurrent modulation schemes, where a memory controller communicates signals modulated using different schemes through separate paths, such as a first signal path with at least three levels and a second signal path with at least two levels, to improve read and write speeds and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If multiple modulation schemes are implemented concurrently through separate signal paths, then read and write speeds are improved, but device complexity increases
Solution Approach 1:
The patent divides the signal transmission system into multiple separate signal paths, each dedicated to a specific modulation scheme (e.g., PAM3 path and PAM2 path). This segmentation allows each path to be optimized independently for its intended function, enabling concurrent operation of different modulation schemes without interference, thereby achieving higher overall data transfer speeds while managing complexity through modular design
Solution Approach 2:
The patent transitions from single-dimensional signal transmission to multi-dimensional transmission by implementing multiple signal paths operating in parallel. Each path operates in its own dimensional space with dedicated resources, allowing simultaneous transmission of multiple modulation schemes. This dimensional expansion enables the system to achieve superior performance metrics that would be unattainable with a single transmission path
2Productivity
If multiple modulation schemes are implemented concurrently, then data transfer performance is improved, but manufacturing costs increase
Solution Approach 1:
The patent designs a memory system with universal signal paths that can handle multiple modulation schemes. The separate signal paths are constructed using standardized components and architectures that can accommodate different modulation types (PAM3, PAM2, etc.), allowing the system to achieve high data transfer performance while using manufacturable, scalable designs that don't require entirely custom hardware for each modulation scheme
3Reliability
If multiple signal paths are used for different modulation schemes, then reliability is improved, but internal interconnects and parasitic components increase
Solution Approach 1:
The patent applies local quality optimization by designing each signal path with specific characteristics tailored to its intended modulation scheme. Each path has optimized impedance, buffering, and signal conditioning elements localized to that path's requirements. This localized optimization improves reliability for each specific transmission channel while minimizing the overall impact on the system by keeping each path's complexity contained and manageable
Data Source
AI summary
Methods, systems, and devices for multiple concurrent modulation schemes in a memory system are described. Techniques are provided herein to communicate data using a modulation scheme having at least three levels and using a modulation scheme having at least two levels within a common system or memory device. Such communication with multiple modulation schemes may be concurrent. The modulated data may be communicated to a memory die through distinct signal paths that may correspond to a particular modulation scheme. An example of a modulation scheme having at least three levels may be pulse amplitude modulation (PAM) and an example of a modulation scheme having at least two levels may be non-return-to-zero (NRZ).