Concurrent Partial Inspector Loop with Speculative Parallelism

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Solution Overview

Problem

Existing methods for parallelizing applications in distributed computer systems face challenges in identifying and managing thread interdependencies, particularly with loops containing indeterminable variables like subscripted subscripts and pointer variables, which hinder automatic parallelism and require costly serialization or runtime analysis.

Innovation Solution

A method involving a base thread and co-inspector/co-threads that execute loop segments, log memory transactions, and compare logs to determine thread interdependencies, allowing for concurrent partial runtime inspection and dynamic parallelization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a compiler performs static analysis to add parallelization instructions, then parallelization can be achieved at compile time, but the compiler cannot handle loops with memory accesses determined only at execution time (subscripted subscripts and pointer variables)

Engineering Contradiction:
Improveautomatic parallelization capabilityVSAvoidhandling of loops with indeterminable variables
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent performs preliminary parallelization at compile time by adding parallelization instructions to loops, while preparing for potential runtime adjustments. The compiler divides loops into segments and adds parallelization directives, but retains the ability to modify execution at runtime based on actual memory access patterns, thus handling both statically analyzable and indeterminable variable cases.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces dynamic runtime inspection mechanisms that allow the system to adapt parallelization decisions based on actual execution. Runtime inspectors monitor memory transactions and can dynamically adjust parallelization strategies, enabling the system to handle loops with subscripted subscripts and pointer variables that cannot be statically analyzed, while maintaining efficiency for loops that can be parallelized.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If runtime analysis is performed to determine thread interdependencies, then loops with indeterminable variables can be parallelized, but the overhead of logging and comparing memory transactions increases execution time

Engineering Contradiction:
Improveparallelization of loops with indeterminable variablesVSAvoidoverhead from runtime inspection
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent divides loop execution into multiple segments, with each segment handled by a dedicated thread. This segmentation allows parallel execution of different loop portions while reducing the scope of runtime inspection needed. Each thread logs memory transactions for its segment, and the inspection overhead is distributed and minimized by focusing only on inter-segment dependencies rather than analyzing the entire loop sequentially.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs partial runtime inspection by focusing only on critical memory transactions and inter-segment dependencies rather than logging all memory operations. The system logs memory transactions selectively and uses efficient comparison techniques to detect thread interdependencies, reducing the overall inspection overhead while maintaining correctness.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If the base thread logs all memory transactions, then complete inspection of thread interdependencies is achieved, but the base thread execution speed is reduced due to logging overhead

Engineering Contradiction:
Improvecompleteness of thread interdependency detectionVSAvoidbase thread execution speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent extracts the logging function from the base thread by introducing a separate co-inspector thread. The base thread executes loop iterations without logging overhead, while the co-inspector thread independently logs memory transactions for the same iterations. This separation eliminates the performance penalty from logging while maintaining complete inspection capability through the co-inspector's detailed memory transaction recording.

Inventive Principle:
Principle #2Taking out (Extraction)

4Productivity

If co-threads execute loop segments in parallel, then processing speed is improved, but thread interdependencies may cause incorrect results requiring serialization

Engineering Contradiction:
Improveparallel processing speedVSAvoidcorrectness of results with thread interdependencies
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements feedback mechanisms where co-inspector threads monitor memory transactions and provide information about potential thread interdependencies to the system. When interdependencies are detected, the system receives feedback to adjust execution, such as serializing specific segments or adjusting synchronization, thus maintaining correctness while maximizing parallel execution where safe.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces co-inspector threads as intermediaries between co-threads executing loop segments. These intermediary threads monitor memory transactions and detect interdependencies, acting as mediators that enable safe parallel execution by identifying and managing conflicts. The intermediaries allow the system to maintain parallelism while ensuring correctness through systematic detection and handling of thread interdependencies.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7823141B1Using a concurrent partial inspector loop with speculative parallelism
Publication Date: 2010.10.26 ORACLE AMERICAN INC
  • US7823141B1 patent drawing
  • US7823141B1 patent drawing
  • US7823141B1 patent drawing

AI summary

A method for executing a loop in an application that includes executing iterations in a first segment of the loop by a base thread, logging memory transactions that occur during execution of iterations in the first segment by a co-inspector thread to obtain a co-inspector log, executing iterations in a second segment of the loop by a co-thread to obtain temporary results, logging memory transactions that occur during execution of iterations in the second segment to obtain a co-thread log, and comparing the co-inspector log and the co-thread log to determine whether a thread interdependency exists.