Concurrent Programming of Non-Volatile Memory Cells
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Solution Overview
Problem
Conventional methods for programming multiple cells in non-volatile memory devices require separate operations, increasing time and steps due to the need for verifying and writing temporary data copies, which hampers efficiency in encoding data.
Innovation Solution
A system and method for concurrently programming multiple storage cells by applying a programming pulse to multiple word lines simultaneously, followed by verify pulses to ensure correct programming, allowing for separate programming if necessary, and utilizing cell compaction operations to efficiently encode data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate programming operations are used for multiple cells, then programming accuracy can be verified individually, but the time and number of steps required for encoding data increases
Solution Approach 1:
The patent merges multiple separate programming operations into a single concurrent programming operation. Multiple storage cells are programmed simultaneously using shared programming circuits and control logic, reducing the total number of operation steps and time required while maintaining verification accuracy through unified control mechanisms
2Reliability
If temporary data copies are written to multiple cells before MLC storage, then data redundancy is achieved, but the number of programming steps and time required increases
Solution Approach 1:
The patent combines the temporary copy writing operation with the final MLC programming operation into a single concurrent process. Multiple cells are programmed simultaneously to achieve both redundancy and final storage in one step, eliminating the need for separate temporary writing and verification steps
Solution Approach 2:
The patent performs preliminary programming of multiple cells concurrently before the final MLC encoding is complete. By initiating programming operations in advance for multiple cells simultaneously, the system prepares data redundancy and final storage states ahead of time, reducing overall operation steps
Data Source
AI summary
Technology is disclosed herein for concurrently programming the same data pattern in multiple sets of non-volatile memory cells. Voltage are applied to bit lines in accordance with a data pattern. A select voltage is applied to drain select gates of multiple sets of NAND strings. The system concurrently applies a program pulse to control gates of a different set of selected memory cells in each respective set of the multiple sets of the NAND strings while the select voltage is applied to the drain select gates of the multiple sets of the NAND strings and the voltages are applied to the plurality of bit lines to concurrently program the data pattern into each set of the selected memory cells.


