Condensed Coherence Directory Entries for Faster PIM Lookups
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Solution Overview
Problem
Conventional computer architectures suffer from increased data transfer latency and reduced memory bandwidth due to remote processing units being further away from memory, leading to performance bottlenecks and energy inefficiencies, especially in processing-in-memory (PIM) architectures that require multiple coherence directory lookups for each bank, exacerbating latency and creating bottlenecks.
Innovation Solution
Implementing a cache coherence controller that creates a condensed entry in the coherence directory to track cache status across multiple banks, allowing a single lookup for subsequent PIM commands, thereby reducing the number of directory lookups and alleviating bottlenecks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple coherence directory lookups are performed for each bank in PIM architectures, then cache coherence is ensured, but lookup latency increases and coherence directory bottlenecks are created
Solution Approach 1:
The patent combines multiple bank-specific coherence directory entries into a single condensed entry that represents the aggregate cache status across multiple banks. This merging reduces the number of lookups required from N (one per bank) to 1 (single condensed entry lookup), thereby reducing lookup latency while maintaining cache coherence through the use of bitwise OR operations to track cache presence across all banks.
Solution Approach 2:
The condensed coherence directory entry serves multiple banks simultaneously with a single entry, making it a universal solution that handles coherence tracking for N banks without requiring N separate entries. This multi-functional approach allows the system to maintain coherence information for multiple banks while reducing the lookup overhead.
2Measurement precision
If multiple coherence directory lookups are performed for each bank in PIM architectures, then accurate cache status tracking is achieved, but coherence directory bottlenecks increase
Solution Approach 1:
Multiple bank-specific coherence directory entries are merged into a single condensed entry that accurately tracks cache status across all banks using bitwise operations. This merging maintains measurement precision by preserving the ability to determine if any bank has cached data, while simultaneously improving productivity by reducing the number of directory lookups and eliminating bottlenecks.
3Loss of time
If condensed coherence directory entries are used to reduce lookups, then lookup latency decreases, but the complexity of the coherence directory structure increases
Solution Approach 1:
The patent changes the structure of coherence directory entries from bank-specific individual entries to condensed aggregate entries that represent multiple banks. This parameter change in the directory structure reduces lookup latency by minimizing the number of lookups required, while the added complexity is offset by the systematic use of bitwise operations to maintain accuracy.
Data Source
AI summary
In accordance with the described techniques for condensed coherence directory entries for processing in memory, a computing device includes a core that includes a cache, a memory that includes multiple banks, a coherence directory that includes a condensed entry indicating that data associated with a memory address and the multiple banks is not stored in the cache, and a cache coherence controller. The cache coherence controller receives a processing-in-memory command to the memory address and performs a single lookup in the coherence directory for the processing-in-memory command based on inclusion of the condensed entry in the coherence directory.