Compare-and-Conditional-Add Command for Atomic Shared-Memory Updates
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As system size increases, the number of requesters contending for access to a shared resource in a memory system grows, leading to challenges in accessing and updating shared values efficiently, particularly in modern processors with a large number of requesters.
Innovation Solution
A compare-and-conditional-add command is introduced to perform an atomic set of operations, including reading a target data value, selectively writing an updated value based on a comparison condition, and providing a comparison condition outcome indication, which ensures atomicity and reduces interference from other requesters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple requesters access shared memory locations simultaneously, then system throughput increases, but contention for access increases leading to reduced reliability of access operations
Solution Approach 1:
The patent combines the read, compare, and write operations into a single atomic compare-and-conditional-add instruction. This merging ensures that the entire sequence of operations executes without interference from other requesters, eliminating the reliability issues caused by contention while maintaining high system throughput through efficient single-instruction execution.
Solution Approach 2:
The patent introduces a conditional update mechanism that acts as an intermediary between the read and write operations. The compare operation serves as a mediator that determines whether the write should proceed, allowing the system to handle multiple requesters efficiently by only performing writes when conditions are met, thus reducing contention overhead.
2Adaptability or versatility
If standard read-modify-write operations are used, then flexibility in updating shared values is maintained, but vulnerability to external interference increases during the operation sequence
Solution Approach 1:
The patent merges the read, compare, and write operations into a single atomic instruction sequence. This combination eliminates the time window during which external interference could occur between separate read and write operations, while maintaining the flexibility to conditionally update values based on comparison results.
Solution Approach 2:
The patent performs the compare operation as a preliminary action before the write operation within the same atomic sequence. This preliminary comparison determines whether the write should proceed, and because both operations are atomic, the system is protected from external interference that could occur between separate read-modify-write operations.
3Reliability
If atomic operations are implemented to reduce contention issues, then access reliability improves, but operation duration increases reducing system throughput
Solution Approach 1:
The patent combines multiple operations into a single atomic compare-and-conditional-add instruction that executes in one unified sequence. This merging reduces the total operation duration compared to implementing separate atomic read, compare, and write operations, while maintaining reliability through the atomic nature of the combined operation.
Solution Approach 2:
The patent creates a universal atomic instruction that performs read, compare, and write operations in a single executable unit. This multi-functional instruction reduces overhead and execution time compared to multiple separate atomic operations, while ensuring reliability through its atomic execution guarantee.
Data Source
AI summary
An apparatus comprises decoding circuitry to decode a compare-and-conditional-add command identifying a target address, compare data value, and addend data value. Processing circuitry is responsive to the compare-and-conditional-add command to trigger an atomic set of operations to: read a target data value from a storage location corresponding to the target address, and selectively write an updated data value to the storage location in dependence on whether the compare data value satisfies a comparison condition with respect to the target data value. The updated data value comprises a result of an addition of the target data value and the addend data value performed in response to the compare-and-conditional-add command. A comparison condition outcome indication is provided indicating whether the compare data value satisfied the comparison condition. The comparison condition outcome indication comprises at least one of the target data value and the updated data value.