Conditional DMA Channel Activation for Complex SoC Transfers
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Solution Overview
Problem
Conventional DMA controllers lack flexibility in triggering DMA channels, as they cannot perform comparisons or logical operations, limiting the ability to activate peripherals that were not preconfigured during SoC development, and overburden the CPU in modern vehicle systems with complex data transfer requirements.
Innovation Solution
A conditional DMA channel activation (CDCA) system that uses a look-up table to perform logical operations and comparisons, allowing any bit or memory-mapped address to trigger DMA transactions, enabling flexible activation of DMA channels and reducing CPU load by allowing multiple activation sources and chaining of conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional DMA controllers are used with preconfigured hardware multiplexer, then data transfer can be performed, but the system lacks flexibility to activate peripherals not preconfigured during SoC development
Solution Approach 1:
The patent implements dynamic DMA channel activation by replacing static hardware multiplexer configuration with runtime software-controlled activation. The DMA controller can dynamically select and activate channels based on peripheral requests and system conditions, allowing flexible adaptation without hardware reconfiguration.
Solution Approach 2:
The system changes the activation parameter from fixed hardware wiring to software-configurable register settings. By modifying activation registers and control parameters at runtime, the system can enable or disable DMA channels for different peripherals without physical hardware changes.
2Productivity
If conventional DMA controllers without comparison capability are used, then simple data transfer is efficient, but complex conditional data transfer requires CPU intervention increasing load
Solution Approach 1:
The DMA controller performs self-service by autonomously executing comparison operations and logical evaluations on data before triggering transfers. The controller independently determines whether transfer conditions are met without requiring CPU intervention, maintaining high data transfer efficiency while reducing CPU load.
Solution Approach 2:
The DMA controller is enhanced with multi-functionality to perform not only data transfer but also comparison operations, logical evaluations, and conditional decision-making. This universal capability allows the controller to handle both simple and complex transfer scenarios without external CPU assistance.
3Ease of operation
If DMA channels are activated without conditional logic, then activation is simple and fast, but the system cannot perform logical operations or comparisons on data
Solution Approach 1:
The activation process is segmented into distinct stages: initial activation signal reception, conditional evaluation stage with comparison operations, and final transfer execution. This segmentation allows the system to maintain simple activation triggers while incorporating complex logical operations in the intermediate evaluation stage.
Solution Approach 2:
An intermediary activation logic layer is introduced between the simple activation trigger and the data transfer execution. This intermediary performs comparison operations and logical evaluations, bridging the gap between simple activation signals and complex transfer requirements.
Data Source
AI summary
A conditional direct memory access (DMA) channel activation system for executing a complex data transfer in a system-on-chip, comprising: a look-up table constructed and arranged to store elements of an activation profile; and a trigger circuit that controls a DMA transaction according to the activation profile of the look-up table.