Conditional Row Activation During Memory Refresh

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Solution Overview

Problem

Current memory devices face reduced bandwidth during refresh operations due to the need for exclusive access, which limits the utilization of command and data buses, potentially leading to data corruption if operations are performed concurrently with refresh commands.

Innovation Solution

Implementing conditional row activation and access methods that allow host devices to issue activate commands during refresh operations, with the memory device determining whether to execute these commands based on the alignment of refresh operations and the target row, and providing an indicator signal to the host device to ensure data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If exclusive access is required during refresh operations, then data integrity is maintained, but bandwidth is reduced and command/data bus utilization is limited

Engineering Contradiction:
Improvedata integrityVSAvoidbandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic control of row activation during refresh operations. The system transitions from static exclusive access to dynamic conditional access, where the memory device evaluates each activate command against current refresh state and either permits or blocks execution. This dynamic approach allows the system to adapt access permissions in real-time, maintaining data integrity when refresh operations are active while allowing normal operations when safe, thereby optimizing bandwidth utilization without compromising reliability.

Inventive Principle:
Principle #15Dynamics

2Productivity

If activate commands are allowed during refresh operations, then bandwidth is improved and bus utilization increases, but data corruption risk increases

Engineering Contradiction:
ImprovebandwidthVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the memory device monitors refresh operation status and provides real-time evaluation of activate commands. When an activate command is received during refresh, the memory device assesses whether the command targets a row currently being refreshed and responds accordingly - either permitting the command if safe or blocking it if corruption risk exists. This feedback loop enables the system to dynamically adjust access permissions based on current operational state, allowing bandwidth optimization while maintaining data integrity through intelligent command filtering.

Inventive Principle:
Principle #23Feedback

3Reliability

If command and data buses remain idle during tRFC period, then data corruption is prevented, but overall bandwidth is reduced

Engineering Contradiction:
Improvedata integrityVSAvoidbandwidth utilization
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements partial action by allowing selective execute of activate commands during the tRFC period rather than complete blocking. Instead of idling the command and data buses entirely during refresh operations, the system evaluates each incoming activate command and permits execution when it does not conflict with ongoing refresh operations. This partial execution approach recovers useful bandwidth during previously idle periods while maintaining data integrity by blocking only those commands that would cause corruption, thereby reducing time loss without compromising reliability.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11468939B2Conditional row activation and access during refresh for memory devices and associated methods and systems
Publication Date: 2022.10.11 MICRON TECHNOLOGY INC
  • US11468939B2 patent drawing
  • US11468939B2 patent drawing
  • US11468939B2 patent drawing

AI summary

Memory devices, systems including memory devices, and methods of operating memory devices are described, in which memory devices are configured to conditionally activate certain rows during refresh operations such that the memory devices can execute operations directed to the activated rows concurrently with the refresh operations. In some embodiments, the memory device receives an activate (ACT) command directed to a section of a memory bank while performing refresh operations for the memory bank. The memory device may carry out the ACT command if certain conditions are satisfied not to corrupt the data being refreshed. Subsequently, the memory device generates a signal to indicate the ACT command has been accepted to activate a row identified by the ACT command. Further, the memory device can perform subsequent access commands directed to the row, in parallel with the refresh operations.