Conditional Subtraction Instructions for Homomorphic Encryption NTT

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Solution Overview

Problem

Homomorphic encryption (HE) operations in privacy-preserving machine learning (PPML) are computationally expensive due to bottlenecks in polynomial multiplication, particularly in the negacyclic number-theoretic transform (NTT) operations, which include modular addition and multiplication.

Innovation Solution

Introduce a set of conditional subtraction instructions, such as vpcondsubuq, to optimize forward and inverse NTT operations and element-wise modular multiplication, reducing the number of instructions required for HE operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional HE operations are performed using standard arithmetic instructions, then correctness is maintained, but computational expense and execution time increase significantly

Engineering Contradiction:

ImproveHE operation speedVSAvoidcomputational expense

Core Design Contradiction:

ProductivityVSPower

Solution Approach 1:

The patent combines multiple sequential arithmetic operations (subtraction, comparison, conditional selection) into a single conditional subtraction instruction. This merges the operations of computing a difference, determining its sign, and selectively applying the modulus, thereby reducing the total number of instructions and improving HE operation speed without increasing computational expense.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent replaces multiple mechanical arithmetic operations with a specialized conditional subtraction instruction that implements modular subtraction in a single operation. This substitution eliminates the need for separate subtraction, comparison, and conditional execution steps, directly reducing computational expense while maintaining correctness.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If multiple sequential instructions are used for modular subtraction operations, then operational flexibility is maintained, but instruction count and execution time increase

Engineering Contradiction:

Improvepolynomial multiplication speedVSAvoidnumber of instructions

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple sequential instructions (subtraction, comparison, conditional selection) into a single conditional subtraction instruction. This reduces the instruction count for polynomial multiplication operations, thereby improving productivity without increasing device complexity.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The conditional subtraction instruction performs multiple functions within a single operation: it computes the difference, determines the sign, and applies the modulus conditionally. This multi-functionality reduces the number of instructions needed for HE operations, improving polynomial multiplication speed without adding complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Productivity

If standard arithmetic operations are used for NTT computations, then correctness is preserved, but computational efficiency decreases

Engineering Contradiction:

ImproveNTT operation efficiencyVSAvoidexecution time for HE operations

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent replaces standard arithmetic operations with a specialized conditional subtraction instruction that is optimized for NTT computations. This substitution reduces the number of cycles required for modular subtraction, thereby improving NTT operation efficiency and reducing execution time without compromising correctness.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the operational parameters by introducing a conditional subtraction instruction that operates differently based on the sign of the difference. This parameter change enables more efficient handling of negative results in modular arithmetic, improving NTT efficiency and reducing execution time while maintaining correctness.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS12443409B2Conditional modular subtraction instruction

Publication Date: 2025.10.14 INTEL CORP

AI summary

One embodiment provides a processor comprising first circuitry to decode an instruction into a decoded instruction, the instruction to indicate a first source operand and a second source operand and second circuitry including a processing resource to execute the decoded instruction, wherein responsive to the decoded instruction, the processing resource is to output a result of first source operand data minus second source operand data in response to a determination by the processing resource that the first source operand data is greater than or equal to the second source operand data, otherwise the processing resource is to output the first source operand data.