Conducting Line Grain Growth via Low-Temperature Annealing
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Solution Overview
Problem
Conventional methods for enlarging grain sizes of conducting lines in electronic components, such as those used in printed circuit boards and integrated fan-out wafer-level packages, require high-temperature thermal annealing, which is economically inefficient and can cause thermal damage, and do not effectively improve the mechanical and thermal reliability due to fine grain sizes.
Innovation Solution
A method involving an electroplating process to deposit metal thin films with a preferred crystallographic orientation followed by a low-temperature thermal annealing treatment, conducted between 25°C and 240°C, to achieve grain sizes between 5 μm and 100 μm, enhancing the ductility and elongation of conducting lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high-temperature thermal annealing is used to enlarge grain size, then grain size increases, but thermal damage occurs to other component materials and economic efficiency decreases
Solution Approach 1:
The patent changes the temperature parameter from conventional high-temperature annealing (250°C or above) to low-temperature annealing (below 250°C, specifically 150-220°C). This parameter change enables grain growth while avoiding thermal damage to surrounding components, resolving the contradiction between achieving large grain size and preventing thermal damage.
Solution Approach 2:
The patent applies preliminary crystallographic orientation control during the electroplating process before annealing. By pre-establishing a preferred crystallographic orientation (such as <100> direction) in the copper layer during plating, the subsequent low-temperature annealing can effectively promote grain growth along these oriented directions, achieving large grain size without requiring high temperatures that would cause thermal damage.
2Manufacturing precision
If high-temperature thermal annealing is conducted for several hours, then grain size enlarges, but economic efficiency deteriorates due to time and energy consumption
Solution Approach 1:
The patent changes both temperature and time parameters of the annealing process. By reducing the temperature to below 250°C (specifically 150-220°C), the required annealing time is dramatically reduced from several hours to just 1-10 minutes. This parameter optimization achieves large grain size while significantly improving economic efficiency through reduced energy consumption and increased production throughput.
Solution Approach 2:
The preliminary crystallographic orientation established during electroplating creates a favorable microstructure that accelerates grain growth during annealing. This pre-prepared orientation structure allows the annealing process to achieve effective grain enlargement much faster than conventional methods, reducing processing time from hours to minutes and thereby improving productivity and economic efficiency.
3Quantity of substance
If conventional electroplating is used, then conducting lines are formed, but grain size remains small (1-4 μm) leading to poor mechanical properties
Solution Approach 1:
The patent applies preliminary crystallographic orientation control during the electroplating process by adjusting plating parameters (current density, additives, temperature) to promote the formation of a preferred crystal orientation (such as <100> direction). This pre-established orientation structure serves as a foundation for subsequent grain growth during low-temperature annealing, enabling the transformation from fine-grained (1-4 μm) to coarse-grained (50-100 μm) structure and thereby improving mechanical properties like ductility and elongation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively increases the grain size of conducting lines, improving their mechanical and thermal reliability by enhancing ductility and elongation, while avoiding the thermal damage associated with high-temperature annealing.
Implementation Method 1
to perform an electroplating process to deposit conducting lines with a preferred crystallographic orientation over a substrate
Implementation Method 2
to perform a low-temperature heat (thermal annealing) treatment on the conducting lines, and to make the conducting lines with crystal grain sizes in a range of 5 μm to 100 μm
Data Source
AI summary
A method for microstructure modification of conducting lines is provided. An electroplating process is performed to deposit the metal thin film/conducting line(s) with a face-centered cubic (FCC) structure and a preferred crystallographic orientation over a surface of a substrate. The metal thin film/ conducting line(s) is subsequently subjected to a thermal annealing process to modify its microstructure with the grain sizes in a range of 5 μm to 100 μm. The thermal annealing process is conducted at the temperature of above 25 degrees Celsius and below 240 degrees Celsius.