Conductive Adhesion Layer for Semiconductor Contact Resistance Reduction

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Solution Overview

Problem

The formation of silicon oxide regions during etching in FinFET semiconductor devices leads to higher contact resistance and barrier height, adversely affecting device quality due to oxidation of silicon in the electrodes.

Innovation Solution

A method involving the formation of a conductive adhesion layer on the bottom and sidewalls of contact holes to prevent electrode oxidation, followed by filling these holes with a contact member, which includes forming a sacrificial layer and etching to expose the gate, thereby reducing contact resistance and barrier height.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If etching is performed to form contact holes, then contact holes are formed exposing the electrodes, but silicon oxide regions form on the electrodes resulting in higher contact resistance and barrier height

Engineering Contradiction:
Improvecontact hole formationVSAvoidcontact resistance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A conductive adhesion layer is formed on the bottom and sidewalls of contact holes before filling them with contact members. This preliminary formation of the conductive adhesion layer prevents silicon oxidation during subsequent processing steps, thereby reducing contact resistance and barrier height while maintaining manufacturing precision for contact hole formation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If conductive adhesion layer is formed on contact hole bottom and sidewalls, then electrode oxidation is prevented, but process complexity increases

Engineering Contradiction:
Improvecontact resistanceVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive adhesion layer serves multiple functions simultaneously: it acts as a barrier to prevent silicon oxidation, provides a conductive path to reduce contact resistance, and enhances adhesion between the contact member and the electrode. By combining multiple functions into a single layer, the process complexity is minimized while achieving reliable low-resistance contacts.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces contact resistance and barrier height in semiconductor devices by preventing electrode oxidation during the contact formation process, improving device performance.

Implementation Method 1

due to etching, the silicon in the electrodes in the active region is oxidized to form silicon oxide regions 301, 302, 303, and 304, resulting in higher contact resistance and barrier height

Methodology Applied
Scientific EffectOxidation prevention: Oxidation

Data Source

PatentUS10580694B2Contact structure and method of forming the same
Publication Date: 2020.03.03 SEMICON MFG INT (SHANGHAI) CORP
  • US10580694B2 patent drawing
  • US10580694B2 patent drawing
  • US10580694B2 patent drawing

AI summary

A method for manufacturing a semiconductor device includes providing a substrate structure including a substrate, an active region on the substrate, an electrode in the active region, and an interlayer dielectric layer covering the active region and the electrode. The method also includes etching the interlayer dielectric layer to form a contact hole exposing the electrode, forming a conductive adhesion layer on a bottom and sidewalls of the contact hole, and forming a contact member on the conductive adhesion layer filling the contact hole. The conductive adhesion layer at the bottom and sidewalls of the contact hole prevents the electrode from being oxidized while forming the contact member, thereby effectively reducing the contact resistance and the barrier height of the semiconductor device.