Conductive Bump Reliability via Redistribution Layer Trenches
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Solution Overview
Problem
The existing flip chip packaging approach for semiconductor devices faces challenges with high connection resistance, limited current handling capability, complex design flexibility, electrical shorts due to conductive bump migration, and delamination under extreme conditions, particularly in high-density and high-current applications.
Innovation Solution
The solution involves forming shallow trenches in the passivation layer to expose electrical terminals, creating a conductive redistribution layer within these trenches, and forming conductive bumps on the redistribution layer to connect the terminals, which reduces connection resistance and prevents bump migration, while a polyimide layer or additional shallow trenches further enhance separation and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive bumps are formed directly on passivation layer over dedicated pads, then electrical connection is established, but connection resistance is high and current handling capability is limited
Solution Approach 1:
The patent divides the connection structure into multiple segments: dedicated pads, conductive redistribution layers, and conductive bumps. The conductive redistribution layer is formed in shallow trenches and acts as an intermediate conductor that reduces overall connection resistance while improving current handling capability between the pads and bumps.
2Productivity
If pitch between electrical pads is decreased to reduce device size, then device density increases, but conductive bumps may bridge during thermal reflow causing electrical shorts
Solution Approach 1:
The conductive redistribution layer formed in shallow trenches acts as an intermediary structure between the dedicated pads and conductive bumps. This intermediate layer provides mechanical support and spatial separation that prevents bump bridging during thermal reflow, enabling higher device density without compromising reliability.
3Ease of manufacture
If complex routing is used to connect electrical terminals to dedicated pads, then all terminals can be connected, but design flexibility is reduced and routing becomes hard to design
Solution Approach 1:
The patent introduces a third dimension by forming conductive redistribution layers in shallow trenches within the passivation layer. This vertical dimension provides additional routing space and flexibility, allowing complex terminal connections without increasing planar routing complexity, thus improving ease of manufacture while maintaining design flexibility.
4Strength
If molding compound is formed to wrap and mold the package, then package protection is provided, but delamination from die surface occurs under high temperature and humidity conditions
Solution Approach 1:
The patent performs preliminary action by forming shallow trenches and filling them with conductive redistribution layers before applying the molding compound. This preliminary structural preparation creates mechanical interlocking features and stress relief paths that prevent delamination between the molding compound and die surface under high temperature and humidity conditions.
Data Source
AI summary
The present disclosure discloses a semiconductor device having conductive bumps formed on a conductive redistribution layer and associated method for manufacturing. The semiconductor device may further include a first type shallow trench formed on a passivation layer overlying a semiconductor substrate. The conductive redistribution layer is formed in the first type shallow trench. A polyimide layer may be formed between neighboring conductive redistribution layers should a plurality of the conductive redistribution layers are formed with or without the first type shallow trench formed for each of the plurality of conductive redistribution layers.