Conductive Cap for HKMG Transistor Gate Diffusion
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Solution Overview
Problem
High dielectric constant (high-K) metal-gate (HKMG) transistors face issues with solid-state diffusion of interconnect material into the substrate, leading to potential damage and threshold voltage fluctuations due to increased gate resistance and reduced dimensions, particularly when the channel length is less than 20 nanometers.
Innovation Solution
A conductive cap is disposed on the gate region of the HKMG transistor, inhibiting the diffusion of interconnect material and work function material, allowing the use of high-conductivity materials like copper for interconnects, which reduces substrate damage and threshold voltage fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If a smaller process technology is used to reduce transistor size, then transistor dimensions are reduced, but leakage current increases and power consumption increases
Solution Approach 1:
The patent changes the material parameters by transitioning from poly-silicon gate to metal gate materials (such as tungsten, cobalt, or titanium nitride) and from silicon dioxide to high-k dielectric materials (such as hafnium oxide). This parameter change enables smaller transistor dimensions while maintaining lower leakage current through the high-k material's superior dielectric properties that prevent charge leakage more effectively than traditional materials.
2Length of moving object
If gate dimensions are reduced to increase transistor density, then transistor size decreases, but gate resistance increases
Solution Approach 1:
The patent changes the gate material parameter from poly-silicon to metal materials with inherently lower resistivity (such as tungsten, cobalt, or titanium nitride). This material parameter change compensates for the increased resistance that would normally result from reduced gate dimensions, allowing smaller gates to maintain acceptable resistance levels and ensure reliable transistor operation.
3Ease of manufacture
If interconnect material is placed directly on gate regions, then manufacturing is simplified, but solid-state diffusion damages the substrate
Solution Approach 1:
The patent introduces an intermediary layer (such as a diffusion barrier layer or capping layer) between the interconnect material and the gate region. This intermediary prevents direct contact and solid-state diffusion between the interconnect material and substrate, eliminating the harmful effect while maintaining manufacturing simplicity by integrating the protective function into the existing layer structure.
4Ease of manufacture
If work function material is allowed to diffuse into interconnect, then manufacturing is simpler, but threshold voltage fluctuates
Solution Approach 1:
The patent introduces a diffusion barrier layer as an intermediary between the work function material and the interconnect. This barrier prevents the unwanted diffusion of work function material into the interconnect, thereby stabilizing the threshold voltage and ensuring consistent transistor electrical characteristics while maintaining a relatively simple manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The conductive cap effectively prevents substrate damage and enhances transistor performance by reducing interconnect material diffusion and work function material migration, thereby improving conductivity and stability.
Implementation Method 1
Boundary areas between various layers of an HKMG transistor may allow for solid-state diffusion of interconnect material into a substrate, potentially resulting in damage to the substrate
Implementation Method 2
the cap may substantially inhibit diffusion of work function material into the interconnect that may result in threshold voltage (Vt) fluctuation
Implementation Method 3
The conductive cap includes a conductive material that electrically connects the gate region to the interconnect
Data Source
AI summary
A semiconductor device includes a gate region, a conductive cap, and an interconnect. The gate region (e.g., a metal-gate transistor) includes a metal gate region and a high dielectric constant (high-K) gate dielectric region. The conductive cap is disposed on a surface of the metal gate region and on a surface of the high-K gate dielectric region, and the interconnect is disposed on the conductive cap. The conductive cap includes a conductive material that electrically connects the gate region to the interconnect.