Conductive Cap-Based Self-Aligned Via Fabrication
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Solution Overview
Problem
The scaling of features in integrated circuits, particularly the formation of conductive vias, faces challenges such as overlay control issues, resolution limitations of lithographic scanners, and the need for multiple masks, which increase costs and may not be feasible with further reduction in via pitch and critical dimensions.
Innovation Solution
Conductive cap-based approaches for self-aligned conductive via fabrication, using conductive caps to facilitate directed self-assembly and selective deposition, enabling improved via shorting margins and reducing the need for conventional etch stop layers, while protecting underlying metals from oxidation and corrosion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithographic processes are used to form vias, then via formation is achievable with current technology, but overlay control issues and resolution limitations prevent further scaling of via pitch and critical dimensions
Solution Approach 1:
The conductive cap structure enables self-aligned via formation where the via automatically aligns to the conductive cap through electrostatic attraction during deposition, eliminating the need for separate alignment operations and achieving sub-lithographic precision
Solution Approach 2:
The conductive cap is formed in advance on the underlying metal structure before via deposition, creating a pre-positioned alignment reference that guides subsequent via formation and ensures precise registration without requiring additional lithography steps
2Manufacturing precision
If multiple lithographic masks are used to achieve smaller via pitches, then resolution may be improved, but manufacturing complexity and costs increase
Solution Approach 1:
The invention extracts the alignment function from the lithographic process by using the conductive cap as a standalone alignment reference that works with any subsequent deposition method, eliminating the need for multiple lithographic masks
Solution Approach 2:
The conductive cap serves multiple functions: it acts as an alignment reference for via formation, provides electrical connectivity, and serves as a template for via deposition, replacing multiple specialized processing steps
3Manufacturing precision
If conventional etch stop layers are used in via formation, then process control is maintained, but via shorting margins are reduced and additional processing steps are required
Solution Approach 1:
The conductive cap acts as an intermediary structure between the underlying metal and the via, providing both mechanical support and electrical connectivity while enabling precise via positioning through electrostatic alignment during deposition
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for continued scaling of via pitches beyond current lithography limits, improving yield and reducing alignment errors, and provides robust interconnects with enhanced reliability and reduced via/contact resistance.
Implementation Method 1
conductive caps to facilitate directed self-assembly
Implementation Method 2
protecting underlying metals from oxidation and corrosion
Implementation Method 3
protecting underlying metals from oxidation and corrosion
Data Source
AI summary
Conductive cap-based approaches for conductive via fabrication is described. In an example, an integrated circuit structure includes a plurality of conductive lines in an ILD layer above a substrate. Each of the conductive lines is recessed relative to an uppermost surface of the ILD layer. A plurality of conductive caps is on corresponding ones of the plurality of conductive lines, in recess regions above each of the plurality of conductive lines. A hardmask layer is on the plurality of conductive caps and on the uppermost surface of the ILD layer. The hardmask layer includes a first hardmask component on and aligned with the plurality of conductive caps, and a second hardmask component on an aligned with regions of the uppermost surface of the ILD layer. A conductive via is in an opening in the hardmask layer and on a conductive cap of one of the plurality of conductive lines.