Conductive Clip with Sloped Profile for Semiconductor Package
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Prior semiconductor packages face issues with excess cost, poor thermal performance, decreased reliability, and large package sizes due to solder wettability problems, particularly with conductive clip structures that result in incomplete solder joints or solder voids.
Innovation Solution
The introduction of a conductive clip with features such as a shaped plate portion, sloped profile, or through-holes that facilitate gas removal during solder reflow, improving solder wettability and anchoring, thereby enhancing bond strength and reducing reliability issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a flat plate-like conductive clip structure is used with traditional solder attach, then the manufacturing process is simple, but solder wettability is poor resulting in incomplete solder joints or solder voids
Solution Approach 1:
The plate portion is divided into multiple regions with different profiles: a first region with a first profile and a second region with a second profile. This segmentation allows each region to serve different functions - the first region provides solder wettability while the second region provides mechanical support, resolving the contradiction between simple structure and reliable solder joints.
Solution Approach 2:
Different regions of the plate portion are given different geometric profiles tailored to their specific functions. The first region has a profile optimized for solder attachment while the second region has a profile optimized for structural support. This local differentiation improves solder joint quality without requiring complete redesign of the entire clip structure.
2Reliability
If through-holes are added to the plate portion to improve solder wettability, then solder voids are reduced, but the manufacturing complexity increases
Solution Approach 1:
The through-holes and sloped profiles are pre-formed in the plate portion before the soldering process. This preliminary structuring ensures that during solder reflow, gas can escape through the pre-configured pathways, preventing solder void formation without requiring complex real-time manufacturing adjustments.
Solution Approach 2:
The plate portion incorporates through-holes that create a porous structure, allowing gas to escape during soldering. This porous design improves solder wettability and reduces voids while maintaining a relatively simple manufacturing approach by using standard hole-forming techniques.
3Reliability
If the plate portion is designed with sloped profiles to facilitate gas removal, then solder wettability improves, but the precision requirements for manufacturing increase
Solution Approach 1:
The plate portion employs asymmetric sloped profiles where the slope angles and directions are specifically designed to facilitate gas escape pathways. The asymmetry is intentional and optimized for function rather than requiring perfect symmetry, allowing manufacturing within standard tolerances while achieving the desired gas removal effect.
Solution Approach 2:
The sloped profiles introduce a dimensional variation in the Z-direction (thickness direction) to create gas escape pathways, rather than relying solely on planar features. This dimensional approach allows gas to be removed through the thickness of the plate, reducing the precision requirements in the planar directions.
4Strength
If a conductive clip with enhanced solder attachment features is used, then bond strength increases, but the package size may increase
Solution Approach 1:
The plate portion serves multiple functions simultaneously: it provides mechanical support, facilitates solder attachment through sloped profiles and through-holes, and enables gas escape during soldering. This multi-functionality allows a single component to achieve high bond strength without requiring additional separate components that would increase package size.
Solution Approach 2:
The support function and solder attachment function are merged into a single plate portion structure. The sloped profiles and through-holes are integrated directly into the plate portion rather than being separate features, consolidating multiple functions into one component and avoiding increased package footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution improves solder wettability, reduces solder voids, and increases bond strength, leading to enhanced reliability and cost-effectiveness in semiconductor package manufacturing.
Implementation Method 1
The features help facilitate the removal of gas(es), such as air generated during the solder reflow process thereby improving solder wettability
Implementation Method 2
when the features include through-holes, the solder migrates up into the through-holes to provide an anchoring effect for the conductive clip
Data Source
AI summary
A packaged electronic device includes a substrate comprising a die pad and a lead spaced apart from the die. An electronic device is attached to the die pad top side. A conductive clip is connected to the substrate and the electronic device, and the conductive clip comprises a plate portion attached to the device top side with a conductive material, a clip connecting portion connected to the plate portion and the lead, and channels disposed to extend inward from a lower side of the plate portion above the device top side. The conductive material is disposed within the channels. In another example, the plate portion comprises a lower side having a first sloped profile in a first cross-sectional view such that an outer section of the first sloped profile towards a first edge portion of the plate portion is spaced away from the electronic device further than an inner section of the first sloped profile towards a central portion of the plate portion. Other examples and related methods are also disclosed herein.