Conductive Dummy Gate Layer for Replacement Metal Gate Process

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Aggressive etching techniques in semiconductor device manufacturing lead to imprecise devices, damaged surfaces, and residual layer issues, particularly in forming gate dielectric devices, which can interfere with device performance.

Innovation Solution

A method involving the formation of a conductive dummy gate layer, such as silicon germanium or titanium nitride, directly connected to the substrate, using a replacement metal gate process that avoids aggressive etching by removing the thick oxide layer at the high-performance transistor area early in the process, allowing for precise gate conductor formation without residual layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If aggressive etching techniques are used to remove dummy gate layers, then gate dielectric devices can be formed, but manufacturing precision deteriorates resulting in imprecise devices and damaged surfaces

Engineering Contradiction:
Improvegate dielectric device formationVSAvoiddevice precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The thick gate oxide layer is removed in advance, before the dummy gate layer is formed. This preliminary removal of the thick oxide eliminates the need for aggressive etching later in the process, as the dummy gate layer can be directly patterned and etched without the interfering thick oxide residue that would require harsh etching conditions

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The conventional sequence is inverted: instead of forming the dummy gate layer first and then using aggressive etching to remove it along with thick oxide, the patent removes the thick oxide first and then forms the dummy gate layer. This reversal eliminates the need for aggressive etching while achieving the same gate dielectric device formation

Inventive Principle:
Principle #13The other way round (Inversion)

2Ease of manufacture

If aggressive etching is used to remove thick gate dielectric, then gate regions can be defined, but device reliability deteriorates due to damaged surfaces and unintentional layer residue

Engineering Contradiction:
Improvegate region definitionVSAvoiddevice reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The thick gate dielectric is removed preliminarily before dummy gate formation, eliminating the need for subsequent aggressive etching that would damage surfaces and leave residue. This early removal ensures clean surfaces and complete etching without compromising device reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent converts the potential harm of thick oxide interference into a benefit by removing it early, which then allows for gentle, precise etching of the dummy gate layer without the need for aggressive conditions that would cause surface damage and residue

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Object-affected harmful factors

If etching is stopped early to avoid damage, then device damage is reduced, but manufacturing precision deteriorates due to residual oxide layers

Engineering Contradiction:
Improvesurface damageVSAvoidetching precision
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The thick oxide removal is performed preliminarily with gentle etching, separating this step from the dummy gate etching. This allows the dummy gate etching to be performed with high precision using mild conditions, while the thick oxide is already gone and won't interfere or require aggressive etching

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8835292B2Method of manufacturing semiconductor devices including replacement metal gate process incorporating a conductive dummy gate layer
Publication Date: 2014.09.16 GLOBALFOUNDRIES US INC
  • US8835292B2 patent drawing
  • US8835292B2 patent drawing
  • US8835292B2 patent drawing

AI summary

A method of manufacturing a semiconductor device including a replacement metal gate process incorporating a conductive dummy gate layer (e.g., silicon germanium (SiGe), titanium nitride, etc.) and a related are disclosed. The method includes forming an oxide layer on a substrate; removing a gate portion of the oxide layer from the substrate in a first region of the semiconductor device; forming a conductive dummy gate layer on the semiconductor device in the first region; and forming a gate on the semiconductor device, the gate including a gate conductor disposed in the first region and directly connected to the substrate.