Conductive Feature Filling After Barrier Layer Etch-Back

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Solution Overview

Problem

The semiconductor industry faces challenges in forming conductive features, particularly in small technology nodes, where voids can form due to constriction at the upper regions of openings, leading to increased resistance or failure in electrical contact.

Innovation Solution

A method involving the formation of a barrier layer and adhesion layer in openings, followed by a two-step etch process to remove the constriction caused by residues, allowing for the deposition of conductive material without voids, and subsequent smoothing of the layers to ensure proper filling and contact.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single-step etch process is used to form openings, then the manufacturing process is simpler and faster, but residues cause constriction at upper regions leading to void formation and increased resistance

Engineering Contradiction:
Improveetching speedVSAvoidopening uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The etching process is divided into multiple steps (e.g., first etch step, second etch step) with different conditions. The first step uses aggressive conditions to rapidly remove material, while the second step uses milder conditions to cleanly finish the opening and remove residues, preventing constriction and void formation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A preliminary etch step is performed with specific conditions to prepare the opening, followed by a finishing etch step that removes residues and smooths the walls. This preliminary action prevents the harmful constriction effect before the final conductive material deposition.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If geometry size is reduced to increase functional density, then production efficiency increases and costs decrease, but void formation and electrical contact failure become more likely

Engineering Contradiction:
Improveproduction efficiencyVSAvoidelectrical contact reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The etching parameters (chemistry, temperature, pressure, power) are optimized and adjusted based on the specific geometry size and aspect ratio of the openings. This allows the process to maintain reliability even at reduced dimensions by adapting the etching conditions to prevent residue accumulation and constriction.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The etching process uses dynamic control of parameters during different stages. For example, power and gas flow rates are adjusted mid-process to transition from high-speed etching to clean-up etching, ensuring reliable filling regardless of the final geometry dimensions.

Inventive Principle:
Principle #15Dynamics

3Manufacturing precision

If multi-step etching processes are used to prevent void formation, then manufacturing precision and reliability improve, but process complexity and manufacturing time increase

Engineering Contradiction:
Improveopening qualityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Multiple etching steps are combined into a single continuous process without intermediate handling or re-alignment. The process uses automated parameter transitions and in-situ cleaning between steps, merging what would otherwise be separate operations into one integrated flow that maintains precision while reducing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240297074A1Conductive Feature Formation and Structure
Publication Date: 2024.09.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240297074A1 patent drawing
  • US20240297074A1 patent drawing
  • US20240297074A1 patent drawing

AI summary

Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, a barrier layer is formed along a sidewall. A portion of the barrier layer along the sidewall is etched back. After etching back the portion of the barrier layer, an upper portion of the barrier layer along the sidewall is smoothed. A conductive material is formed along the barrier layer and over the smoothed upper portion of the barrier layer.