Conductive Feature Geometry for Gap Fill and Overlay Control
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Solution Overview
Problem
The challenge in the semiconductor industry is the difficulty in filling conductive features with conductive material as feature sizes downscale, particularly in forming conductive features with smaller lengths and larger widths, which affects gap fill and increases the risk of misalignment with gate structures due to varying dimensions.
Innovation Solution
The solution involves a method for forming conductive features with varying dimensions by adjusting the width and length of these features through advanced etching processes, such as the opening-widening etch process, which uses pulsed plasma and bias voltage to enhance gap fill and reduce the risk of overlay with gate structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conductive features are formed with smaller lengths and larger widths to improve gap fill, then the gap fill of conductive material is improved, but the risk of misalignment with gate structures increases
Solution Approach 1:
The patent applies local quality by performing selective opening-widening etching only on specific conductive features based on their dimensions. Conductive features with lengths less than a threshold value are widened, while longer features maintain their original dimensions. This localized modification optimizes gap fill for small features without compromising the alignment precision of larger features that are more sensitive to misalignment risks.
Solution Approach 2:
The patent changes the width parameter of conductive features selectively based on their length parameter. By establishing a length-based criterion and applying width modification only to features below the threshold, the patent dynamically adjusts geometric parameters to optimize both gap fill and alignment accuracy across different feature sizes.
2Productivity
If feature sizes are downscaled to increase functional density, then production efficiency is improved and costs are lowered, but the difficulty of filling conductive features increases
Solution Approach 1:
The patent changes the width parameter of select conducing features by performing opening-widening etching on conductive features whose lengths are less than a threshold value. This parameter modification enables better gap fill for small features while maintaining the overall downscaled geometry for high functional density.
Solution Approach 2:
The opening-widening etching process is performed as a preliminary step before conductive material deposition. By pre-adjusting the dimensions of challenging small features, the patent facilitates subsequent material filling and reduces manufacturing difficulties associated with downscaled geometries.
3Manufacturing precision
If opening-widening etch process is applied to conductive features with smaller lengths, then gap fill is improved, but the processing complexity increases
Solution Approach 1:
The patent implements local quality by applying the opening-widening etch process selectively only to conductive features with lengths below a specified threshold. This targeted approach improves gap fill for problematic small features while avoiding unnecessary processing of larger features, thereby limiting the increase in overall process complexity.
Solution Approach 2:
The patent applies partial action by performing opening-widening etching on only a subset of conductive features rather than all features. By using a length-based threshold to identify which features require widening, the patent applies the complex process only where necessary, balancing improved gap fill with acceptable process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the gap fill of conductive material in smaller openings, reduces voids in conductive features, and increases the processing window by allowing for wider conductive features with smaller lengths and narrower features with larger lengths, thereby enhancing the precision and efficiency of semiconductor fabrication.
Implementation Method 1
Etching the first contact opening and the second contact opening comprises etching the dielectric layer through the first mask opening to form the first contact opening and etching the dielectric layer through the second mask opening to form the second contact opening
Implementation Method 2
advanced etching processes, such as the opening-widening etch process
Data Source
AI summary
The present disclosure provides example embodiments relating to conductive features, and methods of forming the conductive features, that have differing dimensions. In an embodiment, a structure includes a substrate, a dielectric layer over the substrate, and first and second conductive features through the dielectric layer to first and second source/drain regions, respectively, on the substrate. The first conductive feature has a first length along a longitudinal axis of the first conductive feature and a first width perpendicular to the first length. The second conductive feature has a second length along a longitudinal axis of the second conductive feature and a second width perpendicular to the second length. The longitudinal axis of the first conductive feature is aligned with the longitudinal axis of the second conductive feature. The first width is greater than the second width, and the first length is less than the second length.