Semiconductor Conductive Feature Interface Mixing for Low-Resistance Vias
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Solution Overview
Problem
The integration of semiconductor devices faces challenges in reducing resistance and improving yield and reliability of conductive features due to seam merging and thermal expansion during the formation of vias and lines, which are critical for high-density electronic components.
Innovation Solution
The formation of conductive features using a liner layer comprising a first conductive material and a filler layer that forms a homogeneous mixture, followed by a thermal process to create a smoother interface, and a capping layer to increase contact area, reducing resistance and contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional single-layer conductive material is used to form vias and lines, then the manufacturing process is simple, but seam merging and thermal expansion cause increased resistance and reduced reliability
Solution Approach 1:
The conductive feature formation process is segmented into multiple sequential steps: depositing a first conductive material layer, forming openings through it, depositing a second conductive material layer in the openings, and selectively removing portions. This segmentation allows each layer to serve specific functions (e.g., adhesion, conductivity, stress management) that collectively improve reliability while managing the complexity through systematic process design.
Solution Approach 2:
The patent employs composite conductive structures with multiple material layers (e.g., tungsten and copper, or cobalt and copper) instead of single-material conductors. These composite structures combine materials with complementary properties: one material provides adhesion and stress control while the other provides low resistance, thereby improving overall reliability and electrical performance.
2Productivity
If minimum feature size is reduced to improve integration density, then more components can be integrated, but resistance in conductive features increases and yield decreases
Solution Approach 1:
The patent applies different material properties to different regions and layers of the conductive structure. For example, the first conductive material layer may have different compositional or structural characteristics than the second layer, with each layer optimized for its specific location and function. This local optimization allows the structure to maintain low resistance and high reliability even at reduced feature sizes.
Solution Approach 2:
The patent modifies physical and chemical parameters of the conductive materials, including composition ratios, crystal structure, grain size, and stress states. By controlling these parameters during deposition and processing, the conductive features maintain optimal electrical properties and mechanical stability at smaller dimensions, thereby supporting higher integration density without sacrificing yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the reliability and yield of conductive features by minimizing bending and seam merging, thereby improving the performance of semiconductor devices.
Implementation Method 1
a thermal process to create a smoother interface
Implementation Method 2
seam merging and thermal expansion during the formation of vias and lines
Data Source
AI summary
A method includes forming a device region over a substrate; forming a first dielectric layer over the device region; forming an opening in the first dielectric layer; conformally depositing a first conductive material along sidewalls and bottom surfaces of the opening; depositing a second conductive material on the first conductive material to fill the opening, wherein the second conductive material is different from the first conductive material; and performing a first thermal process to form an interface region extending from a first region of the first conductive material to a second region of the second conductive material, wherein the interface region includes a homogeneous mixture of the first conductive material and the second conductive material.