Conductive Interconnect Silicide Formation via Vacuum Deposition

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Solution Overview

Problem

As semiconductor manufacturing advances to smaller technology nodes, the reliability and performance of conductive interconnects in semiconductor chips are compromised due to increased integration levels and shrinking feature sizes, leading to integrity and system performance issues.

Innovation Solution

The method involves forming conductive interconnects in a semiconductor device by depositing a conductive layer over exposed surfaces within a vacuum environment, followed by a silicon layer to prevent metal oxide formation and enhance adhesion, and then forming a metal silicide layer by reacting the conductive layer with silicon, all while maintaining the vacuum to prevent defects like bubbles or peeling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional deposition processes are used for conductive interconnects, then manufacturing simplicity is maintained, but metal oxide layer formation occurs leading to poor adhesion and reliability issues

Engineering Contradiction:

Improveconductive interconnect integrityVSAvoidmetal oxide layer formation

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies vacuum environment deposition to prevent metal oxide layer formation on conductive interconnect surfaces. By maintaining a vacuum atmosphere during the deposition of dielectric layers, the process eliminates oxygen exposure that would otherwise cause oxide formation, thereby ensuring proper adhesion and improving conductive interconnect reliability.

Inventive Principle:

Principle #39Inert atmosphere (Inert environment)

Solution Approach 2:

The patent implements a continuous vacuum deposition process where the vacuum environment is maintained throughout the entire deposition sequence without breaking vacuum. This continuous action prevents metal oxide formation at all stages of dielectric layer deposition, ensuring consistent adhesion quality and eliminating the need for separate oxidation prevention steps.

Inventive Principle:

Principle #20Continuity of useful action

2Reliability

If vacuum environment deposition is used to prevent metal oxide formation, then adhesion and reliability are improved, but process complexity and manufacturing difficulty increase

Engineering Contradiction:

Improveconductive interconnect adhesionVSAvoidvacuum process implementation

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines multiple deposition steps into a single continuous vacuum process. By merging the deposition of different dielectric layers into one uninterrupted vacuum sequence, the process eliminates the need for separate vacuum chambers or vacuum-breaking steps, thereby reducing overall process complexity while maintaining the adhesion benefits of vacuum deposition.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent uses a single vacuum deposition chamber to perform multiple functions: depositing different dielectric layers, maintaining oxidation-free environment throughout, and ensuring continuous process control. This multi-functional approach simplifies manufacturing by consolidating what would otherwise require multiple separate process steps and equipment.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the integrity and reliability of conductive interconnects by preventing metal oxide layer formation and enhancing adhesion between conductive and dielectric layers, thus addressing the performance and reliability challenges in advanced semiconductor manufacturing.

Implementation Method 1

depositing a conductive layer over the exposed surface of the conductive interconnect in a vacuum environment

Methodology Applied

Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 2

depositing a silicon-containing layer over the conductive layer and the conductive interconnect in the vacuum environment

Methodology Applied

Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 3

forming a metal silicide layer to be a silicide form of the conductive layer by reacting the conductive layer with silicon in the silicon-containing layer

Methodology Applied

Scientific EffectSolid-state diffusion: Diffusion

Data Source

PatentUS11271103B2Semiconductor device and manufacturing process thereof

Publication Date: 2022.03.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method of manufacturing a semiconductor device includes: providing a substrate; forming a gate structure on the substrate; depositing a first dielectric layer over the gate structure; depositing a conductive interconnect in a trench of the first dielectric layer thereby exposing a surface of the conductive interconnect through the first dielectric layer; depositing a conductive layer over the exposed surface of the conductive interconnect; depositing a silicon-containing layer over the conductive layer and the conductive interconnect; and forming a metal silicide layer to be a silicide form of the conductive layer by reacting the conductive layer with silicon in the silicon-containing layer.