Conductive Layer Resistance Measurement for Alignment Error Testing
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Solution Overview
Problem
Current methods for measuring alignment errors in semiconductor structures are limited in accuracy and range, as they rely on surface alignment marks, which cannot effectively measure errors in local structures, leading to issues like short circuits and reduced yield due to inaccurate pattern transfer.
Innovation Solution
A test method and system that measure the alignment error by acquiring the resistance and actual distance between conductive layers on a substrate, allowing for precise calculation of alignment errors and adjustment of process parameters to improve accuracy and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If surface alignment marks are used for measurement, then the measurement process is simple, but the measurement precision and test range are limited
Solution Approach 1:
The patent replaces the mechanical/optical alignment mark measurement system with an electrical resistance measurement system. By measuring resistance between conductive layers at different positions, the alignment error is calculated electrically rather than through complex optical alignment mark detection, thereby improving measurement precision while avoiding the limitations of surface alignment marks.
Solution Approach 2:
The patent introduces conductive layers as intermediary elements between the alignment marks and the measurement system. These conductive layers serve as mediators that enable electrical resistance measurement to indirectly detect alignment errors, providing a new measurement pathway that overcomes the precision limitations of direct optical alignment mark measurement.
2Adaptability or versatility
If alignment marks on cutting path are used, then the alignment operation is straightforward, but the test range is limited and cannot measure local structure errors
Solution Approach 1:
The patent divides the measurement function into multiple segments by placing conductive layers at different positions on the substrate. This segmentation enables independent measurement of alignment errors at each location, expanding the test range to include local structures while maintaining operational simplicity through standardized resistance measurement procedures at each segment.
Solution Approach 2:
The patent transitions from two-dimensional surface alignment mark measurement to three-dimensional electrical resistance measurement through conductive layers. This dimensional change allows measurement of alignment errors in the vertical direction between conductive layers, significantly expanding the test range to include local structure errors that cannot be detected by surface marks alone.
3Reliability
If conventional alignment measurement methods are used, then the process is simple, but accuracy is insufficient leading to short circuits and reduced yield
Solution Approach 1:
The patent implements a feedback mechanism where resistance measurement results are used to calculate and determine alignment errors, which then feed back into the alignment process. This closed-loop feedback system continuously improves measurement precision and enables real-time correction of alignment issues, thereby enhancing semiconductor structure reliability and reducing defects like short circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the measurement accuracy of alignment errors in local structures and expands the test range, reducing the likelihood of short circuits and improving semiconductor structure performance by adjusting process parameters based on measured alignment errors.
Implementation Method 1
a first conductive layer and a second conductive layer are arranged on the substrate at intervals... acquiring a first resistance of the first conductive layer and a second resistance of the second conductive layer
Data Source
AI summary
A test method for an alignment error includes: providing a substrate, wherein a first conductive layer and a second conductive layer are arranged on the substrate at intervals, and the first conductive layer and the second conductive layer are arranged in a first direction; acquiring a first distance; acquiring a first resistance of the first conductive layer and a second resistance of the second conductive layer; acquiring an actual distance between the first conductive layer and the second conductive layer according to the first distance, the first resistance, and the second resistance; and acquiring a value of the alignment error between the first conductive layer and the second conductive layer based on the actual distance and a standard distance between the first conductive layer and the second conductive layer.