Conductive Layer Edge Layout in Electronic Devices for Signal Integrity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The arrangement of a conductive layer in electronic devices increases capacitive load and impedance of signal lines, leading to potential signal line breakage or peeling, and terrain differences among components, affecting the reliability of the device.
Innovation Solution
The electronic device design includes a substrate with a driving element and a conductive layer, where the distance between the driving element and the conductive layer edge is greater than the distance between the electronic element and the edge, and the conductive line width transitions to reduce overlapping areas, ensuring a larger width at the edge to minimize disconnection and peeling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a large area conductive layer is formed to enable heat dissipation and reduce electromagnetic interference, then the heat dissipation and EMI reduction functions are improved, but the capacitive load of electronic components and impedance of signal lines increase
Solution Approach 1:
The conductive layer is designed with spatially varying properties: in the first region (closer to electronic components), the conductive layer has a smaller area or is partially removed to reduce capacitive load and impedance; in the second region (peripheral areas), the conductive layer maintains larger area to provide effective heat dissipation and EMI shielding. This local differentiation allows simultaneous optimization of electrical performance and thermal/EMI management.
2Temperature
If a large area conductive layer is formed to enable heat dissipation, then the heat dissipation function is improved, but terrain differences among various electronic components occur, possibly making signal lines broken or peeled off
Solution Approach 1:
The conductive layer area is locally optimized: reduced near electronic components to minimize terrain differences and protect signal lines, while maintained or expanded in peripheral regions to enhance heat dissipation capacity. This spatial differentiation resolves the conflict between thermal management and connection reliability.
Solution Approach 2:
The conductive layer is segmented into different regions with different area characteristics: a first region with smaller area near electronic components and a second region with larger area in peripheral zones. This segmentation allows independent optimization of each region's function while maintaining overall system performance.
3Reliability
If the conductive layer area is reduced to decrease capacitive load and impedance, then the signal transmission quality is improved, but the heat dissipation and EMI shielding effectiveness are reduced
Solution Approach 1:
The conductive layer is designed with different area characteristics in different spatial regions: smaller area in the first region to optimize signal transmission by reducing capacitive load and impedance, while larger area in the second region to maintain effective EMI shielding and heat dissipation. This local differentiation allows simultaneous achievement of both goals.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces capacitive load and improves signal transmission quality by minimizing overlapping areas and reducing the likelihood of disconnection or peeling at the conductive layer edge, enhancing the overall reliability of the electronic device.
Implementation Method 1
arrangement of the conductive layer will increase capacitive load of the electronic components
Implementation Method 2
reduction of electromagnetic interference
Data Source
Figure 1
Figure 2A~2B
Figure 2C
AI summary
An electronic device (10) includes a substrate (100), a driving element (200), a conductive layer (Ml), and an electronic element (300) is provided. The driving element (200) is disposed on the substrate (100). The conductive layer (Ml) is disposed on the substrate (100), wherein there is a first distance (B) between the driving element (200) and an edge (M1E) of the conductive layer (Ml). The electronic element (300) is disposed on the conductive layer (Ml) and is electrically connected to the driving element (200), wherein there is a second distance (A) between the electronic element (300) and the edge (M1E) of the conductive layer (Ml), and the first distance (B) is greater than the second distance (A).