Display Substrate Conductive-Layer Overlap for Dense Pixel Circuits
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Solution Overview
Problem
The increasing demand for high-density pixel displays in display devices leads to higher manufacturing costs, hindering the promotion and popularization of this technology due to complex process requirements.
Innovation Solution
A display substrate design with overlapping but separated conductive layers for initialization and control signal lines, optimizing the layout of pixel driving circuits to achieve high PPI while maintaining efficient signal transmission and reducing manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high-density pixel layout is implemented to improve image quality, then PPI increases and display quality improves, but process requirements become more complex and manufacturing cost increases
Solution Approach 1:
The patent merges the initialization voltage signal line and control signal line into overlapping regions within the same pixel electrode area. By allowing signal lines to overlap in space and share conductive layers, the design reduces the number of separate routing paths needed, thereby simplifying the overall process requirements while maintaining high PPI
Solution Approach 2:
The patent utilizes multiple conductive layers (first conductive layer, second conductive layer, third conductive layer) to route signal lines in three-dimensional space. By transitioning from two-dimensional planar routing to three-dimensional layered routing, the design accommodates high-density pixel layouts without increasing planar complexity, thus reducing manufacturing process complexity while maintaining high PPI
2Measurement precision
If high-density pixel layout is implemented to improve image quality, then PPI increases and display quality improves, but manufacturing cost significantly increases
Solution Approach 1:
The patent merges multiple signal lines (initialization voltage signal line and control signal line) to share overlapping conductive layers and routing paths. This consolidation reduces the total amount of material and processing steps required, thereby lowering manufacturing cost while achieving high PPI
Solution Approach 2:
The conductive layers are designed to serve multiple functions: they simultaneously carry initialization voltage signals and control signals for different transistors within the same pixel. This multi-functionality reduces the need for separate dedicated conductive layers for each signal type, simplifying manufacturing processes and reducing costs while maintaining high pixel density
3Measurement precision
If signal lines are overlapped to reduce layout area, then pixel area is reduced and PPI increases, but signal interference may occur
Solution Approach 1:
The patent employs periodic timing sequences where initialization voltage signals and control signals are applied at different time periods. By separating the temporal activation of overlapping signal lines, the design prevents simultaneous signal conflicts and interference while allowing spatial overlap to reduce pixel area and increase PPI
Solution Approach 2:
The patent introduces a capacitor as an intermediary element that stores and releases voltage at specific timing moments. This capacitor mediates between overlapping signal lines by holding voltage states and preventing direct signal conflicts, thereby enabling safe signal line overlap without interference while maintaining high PPI
Data Source
AI summary
Provided are a display substrate and a display device. The display substrate includes: a base substrate; sub-pixels; light emitting elements; pixel driving circuits; an initialization voltage signal line extending in the first direction; and a control signal line partially extending in the first direction. In a frame of driving the pixel driving circuits of a row of sub-pixels, the control signal controls, in at least one first time period, at least two transistors of the pixel driving circuit to turn on, the initialization voltage signal is provided to the pixel driving circuit in a second time period, and the first and second time periods are separated in timing. An orthographic projection of the initialization voltage signal line on the base substrate overlaps at least partially with that of the control signal line located on a different layer, with an overlapping rate of 60% to 100%.